freedreno/ir3/cf: handle widening too
We can also fold f16->f32 conversions. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>
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@ -26,11 +26,26 @@
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static bool
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is_fp16_conv(struct ir3_instruction *instr)
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{
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if (instr->opc == OPC_MOV &&
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instr->cat1.src_type == TYPE_F32 &&
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if (instr->opc != OPC_MOV)
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return false;
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struct ir3_register *dst = instr->regs[0];
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struct ir3_register *src = instr->regs[1];
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/* disallow conversions that cannot be folded into
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* alu instructions:
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*/
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if (dst->flags & (IR3_REG_EVEN | IR3_REG_POS_INF))
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return false;
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if (instr->cat1.src_type == TYPE_F32 &&
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instr->cat1.dst_type == TYPE_F16)
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return true;
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if (instr->cat1.src_type == TYPE_F16 &&
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instr->cat1.dst_type == TYPE_F32)
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return true;
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return false;
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}
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@ -77,8 +92,15 @@ try_conversion_folding(struct ir3 *ir, struct ir3_instruction *conv)
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if (!is_alu(src))
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return;
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/* avoid folding f2f32(f2f16) together, in cases where this is legal to
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* do (glsl) nir should have handled that for us already:
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*/
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if (is_fp16_conv(src))
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return;
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switch (src->opc) {
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case OPC_SEL_B32:
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case OPC_SEL_B16:
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case OPC_MAX_F:
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case OPC_MIN_F:
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case OPC_SIGN_F:
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@ -97,18 +119,22 @@ try_conversion_folding(struct ir3 *ir, struct ir3_instruction *conv)
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* change the dst type to F32 to get the right behavior, since we
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* could be moving a float with a u32.u32 move.
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*/
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src->cat1.dst_type = TYPE_F16;
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src->cat1.src_type = TYPE_F32;
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src->cat1.dst_type = conv->cat1.dst_type;
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src->cat1.src_type = conv->cat1.src_type;
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} else {
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/* Otherwise, for typechanging movs, we can just change the dst
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* type to F16 to collaps the two conversions. For example
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* cov.s32f32 follwed by cov.f32f16 becomes cov.s32f16.
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*/
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src->cat1.dst_type = TYPE_F16;
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src->cat1.dst_type = conv->cat1.dst_type;
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}
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}
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if (conv->regs[0]->flags & IR3_REG_HALF) {
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src->regs[0]->flags |= IR3_REG_HALF;
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} else {
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src->regs[0]->flags &= ~IR3_REG_HALF;
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}
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rewrite_uses(ir, conv, src);
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}
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