anv: Plumb deref block size through to 3DSTATE_SF
Cc: "20.0" mesa-stable@lists.freedesktop.org Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3454>
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@ -84,7 +84,8 @@ void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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const struct gen_l3_config *l3_config,
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const struct gen_l3_config *l3_config,
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VkShaderStageFlags active_stages,
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VkShaderStageFlags active_stages,
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const unsigned entry_size[4]);
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const unsigned entry_size[4],
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enum gen_urb_deref_block_size *deref_block_size);
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void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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void genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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struct anv_address dst, struct anv_address src,
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struct anv_address dst, struct anv_address src,
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@ -46,6 +46,7 @@
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#include "common/gen_clflush.h"
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#include "common/gen_clflush.h"
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#include "common/gen_decoder.h"
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#include "common/gen_decoder.h"
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#include "common/gen_gem.h"
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#include "common/gen_gem.h"
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#include "common/gen_l3_config.h"
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#include "dev/gen_device_info.h"
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#include "dev/gen_device_info.h"
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#include "blorp/blorp.h"
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#include "blorp/blorp.h"
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#include "compiler/brw_compiler.h"
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#include "compiler/brw_compiler.h"
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@ -76,7 +77,6 @@ struct anv_image_view;
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struct anv_instance;
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struct anv_instance;
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struct gen_aux_map_context;
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struct gen_aux_map_context;
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struct gen_l3_config;
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struct gen_perf_config;
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struct gen_perf_config;
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#include <vulkan/vulkan.h>
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#include <vulkan/vulkan.h>
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@ -147,7 +147,7 @@ genX(cmd_buffer_so_memcpy)(struct anv_cmd_buffer *cmd_buffer,
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genX(emit_urb_setup)(cmd_buffer->device, &cmd_buffer->batch,
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genX(emit_urb_setup)(cmd_buffer->device, &cmd_buffer->batch,
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cmd_buffer->state.current_l3_config,
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cmd_buffer->state.current_l3_config,
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VK_SHADER_STAGE_VERTEX_BIT, entry_size);
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VK_SHADER_STAGE_VERTEX_BIT, entry_size, NULL);
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) {
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anv_batch_emit(&cmd_buffer->batch, GENX(3DSTATE_SO_BUFFER), sob) {
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#if GEN_GEN < 12
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#if GEN_GEN < 12
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@ -259,7 +259,8 @@ void
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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const struct gen_l3_config *l3_config,
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const struct gen_l3_config *l3_config,
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VkShaderStageFlags active_stages,
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VkShaderStageFlags active_stages,
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const unsigned entry_size[4])
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const unsigned entry_size[4],
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enum gen_urb_deref_block_size *deref_block_size)
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{
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{
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const struct gen_device_info *devinfo = &device->info;
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const struct gen_device_info *devinfo = &device->info;
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@ -269,7 +270,7 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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active_stages &
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active_stages &
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VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
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VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
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active_stages & VK_SHADER_STAGE_GEOMETRY_BIT,
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active_stages & VK_SHADER_STAGE_GEOMETRY_BIT,
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entry_size, entries, start, NULL);
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entry_size, entries, start, deref_block_size);
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#if GEN_GEN == 7 && !GEN_IS_HASWELL
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#if GEN_GEN == 7 && !GEN_IS_HASWELL
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/* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
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/* From the IVB PRM Vol. 2, Part 1, Section 3.2.1:
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@ -298,7 +299,8 @@ genX(emit_urb_setup)(struct anv_device *device, struct anv_batch *batch,
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}
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}
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static void
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static void
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emit_urb_setup(struct anv_pipeline *pipeline)
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emit_urb_setup(struct anv_pipeline *pipeline,
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enum gen_urb_deref_block_size *deref_block_size)
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{
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{
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unsigned entry_size[4];
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unsigned entry_size[4];
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for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
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for (int i = MESA_SHADER_VERTEX; i <= MESA_SHADER_GEOMETRY; i++) {
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@ -311,7 +313,8 @@ emit_urb_setup(struct anv_pipeline *pipeline)
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genX(emit_urb_setup)(pipeline->device, &pipeline->batch,
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genX(emit_urb_setup)(pipeline->device, &pipeline->batch,
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pipeline->urb.l3_config,
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pipeline->urb.l3_config,
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pipeline->active_stages, entry_size);
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pipeline->active_stages, entry_size,
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deref_block_size);
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}
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}
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static void
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static void
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@ -565,7 +568,8 @@ emit_rs_state(struct anv_pipeline *pipeline,
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const VkPipelineMultisampleStateCreateInfo *ms_info,
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const VkPipelineMultisampleStateCreateInfo *ms_info,
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const VkPipelineRasterizationLineStateCreateInfoEXT *line_info,
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const VkPipelineRasterizationLineStateCreateInfoEXT *line_info,
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const struct anv_render_pass *pass,
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const struct anv_render_pass *pass,
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const struct anv_subpass *subpass)
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const struct anv_subpass *subpass,
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enum gen_urb_deref_block_size urb_deref_block_size)
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{
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{
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struct GENX(3DSTATE_SF) sf = {
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struct GENX(3DSTATE_SF) sf = {
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GENX(3DSTATE_SF_header),
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GENX(3DSTATE_SF_header),
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@ -584,7 +588,7 @@ emit_rs_state(struct anv_pipeline *pipeline,
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#endif
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#endif
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#if GEN_GEN >= 12
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#if GEN_GEN >= 12
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sf.DerefBlockSize = PerPolyDerefMode;
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sf.DerefBlockSize = urb_deref_block_size;
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#endif
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#endif
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const struct brw_vue_prog_data *last_vue_prog_data =
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const struct brw_vue_prog_data *last_vue_prog_data =
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@ -2144,14 +2148,16 @@ genX(graphics_pipeline_create)(
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vk_find_struct_const(pCreateInfo->pRasterizationState->pNext,
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vk_find_struct_const(pCreateInfo->pRasterizationState->pNext,
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PIPELINE_RASTERIZATION_LINE_STATE_CREATE_INFO_EXT);
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PIPELINE_RASTERIZATION_LINE_STATE_CREATE_INFO_EXT);
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emit_urb_setup(pipeline);
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enum gen_urb_deref_block_size urb_deref_block_size;
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emit_urb_setup(pipeline, &urb_deref_block_size);
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assert(pCreateInfo->pVertexInputState);
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assert(pCreateInfo->pVertexInputState);
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emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
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emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
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assert(pCreateInfo->pRasterizationState);
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assert(pCreateInfo->pRasterizationState);
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emit_rs_state(pipeline, pCreateInfo->pInputAssemblyState,
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emit_rs_state(pipeline, pCreateInfo->pInputAssemblyState,
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pCreateInfo->pRasterizationState,
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pCreateInfo->pRasterizationState,
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ms_info, line_info, pass, subpass);
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ms_info, line_info, pass, subpass,
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urb_deref_block_size);
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emit_ms_state(pipeline, ms_info);
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emit_ms_state(pipeline, ms_info);
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emit_ds_state(pipeline, ds_info, pass, subpass);
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emit_ds_state(pipeline, ds_info, pass, subpass);
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emit_cb_state(pipeline, cb_info, ms_info);
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emit_cb_state(pipeline, cb_info, ms_info);
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