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radv: Set VGT_GS_MODE properly for gfx9 

Reviewed-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Bas Nieuwenhuizen 2017-10-20 03:17:14 +02:00 committed by Dave Airlie
parent 99281c1e8f
commit e6acc20b6a
1 changed files with 7 additions and 4 deletions
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11
src/amd/vulkan/radv_pipeline.c
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@ -1388,7 +1388,8 @@ static const struct radv_prim_vertex_count prim_size_table[] = {
[V_008958_DI_PT_2D_TRI_STRIP] = {0, 0},
};
static uint32_t si_vgt_gs_mode(struct radv_shader_variant *gs)
static uint32_t si_vgt_gs_mode(struct radv_shader_variant *gs,
enum chip_class chip_class)
{
unsigned gs_max_vert_out = gs->info.gs.vertices_out;
unsigned cut_mode;
@ -1406,8 +1407,9 @@ static uint32_t si_vgt_gs_mode(struct radv_shader_variant *gs)
return S_028A40_MODE(V_028A40_GS_SCENARIO_G) |
S_028A40_CUT_MODE(cut_mode)|
S_028A40_ES_WRITE_OPTIMIZE(1) |
S_028A40_GS_WRITE_OPTIMIZE(1);
S_028A40_ES_WRITE_OPTIMIZE(chip_class <= VI) |
S_028A40_GS_WRITE_OPTIMIZE(1) |
S_028A40_ONCHIP(chip_class >= GFX9 ? 1 : 0);
}
static struct ac_vs_output_info *get_vs_output_info(struct radv_pipeline *pipeline)
@ -1428,7 +1430,8 @@ static void calculate_vgt_gs_mode(struct radv_pipeline *pipeline)
pipeline->graphics.vgt_gs_mode = 0;
if (radv_pipeline_has_gs(pipeline)) {
pipeline->graphics.vgt_gs_mode = si_vgt_gs_mode(pipeline->shaders[MESA_SHADER_GEOMETRY]);
pipeline->graphics.vgt_gs_mode = si_vgt_gs_mode(pipeline->shaders[MESA_SHADER_GEOMETRY],
pipeline->device->physical_device->rad_info.chip_class);
} else if (outinfo->export_prim_id) {
pipeline->graphics.vgt_gs_mode = S_028A40_MODE(V_028A40_GS_SCENARIO_A);
pipeline->graphics.vgt_primitiveid_en = true;