From e66be3d3bb40160c7b7d57c596e4a25da168f1e6 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 28 Feb 2017 16:26:55 +1000 Subject: [PATCH] radv: fix txs for sampler buffers I messed this up when I wrote it, this fixes: dEQP-VK.memory.pipeline_barrier.*uniform_texel_buffer.* Reviewed-by: Bas Nieuwenhuizen Cc: "17.0" Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index db7194c3086..a3310e10a72 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -3625,7 +3625,7 @@ static void visit_tex(struct nir_to_llvm_context *ctx, nir_tex_instr *instr) } if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) { - result = get_buffer_size(ctx, res_ptr, false); + result = get_buffer_size(ctx, res_ptr, true); goto write_result; }