pan/bi: Remove NIR->old IR
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8135>
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Alyssa Rosenzweig
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/*
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* Copyright (C) 2020 Collabora Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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* Authors (Collabora):
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* Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
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*/
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#include "compiler.h"
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/* Bifrost requires special functions to be lowered in various machine specific
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* ways. The routines in this file are used in codegen for this. */
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/* New Bifrost has a FEXP2_FAST instruction but requires an auxiliary
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* parameter. */
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static void
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bi_emit_fexp2_new(bi_context *ctx, nir_alu_instr *instr)
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{
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/* FMA_MSCALE T, X, 1.0, 0, 0x18 */
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bi_instruction mscale = {
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.type = BI_FMA,
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.op = { .mscale = true },
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_float32,
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.src = {
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pan_src_index(&instr->src[0].src),
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BIR_INDEX_CONSTANT | 0,
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BIR_INDEX_ZERO,
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BIR_INDEX_CONSTANT | 32,
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},
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.src_types = {
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nir_type_float32,
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nir_type_float32,
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nir_type_float32,
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nir_type_int32,
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},
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.constant = {
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/* 0x3f80000000 = 1.0f as fp32
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* 24 = shift to multiply by 2^24 */
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.u64 = (0x3f800000) | (24ull << 32)
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},
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.swizzle = { { instr->src[0].swizzle[0] } }
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};
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/* F2I_RTE T, T */
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bi_instruction f2i = {
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.type = BI_CONVERT,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_int32,
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.src = { mscale.dest },
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.src_types = { nir_type_float32 },
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.round = BI_ROUND_NONE
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};
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/* FEXP2_FAST T, T, X */
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bi_instruction fexp = {
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.type = BI_SPECIAL_ADD,
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.op = { .special = BI_SPECIAL_EXP2_LOW },
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.dest = pan_dest_index(&instr->dest.dest),
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.dest_type = nir_type_float32,
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.src = { f2i.dest, mscale.src[0] },
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.src_types = { nir_type_int32, nir_type_float32 },
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.swizzle = { {}, { instr->src[0].swizzle[0] } }
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};
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bi_emit(ctx, mscale);
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bi_emit(ctx, f2i);
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bi_emit(ctx, fexp);
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}
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/* Even on new Bifrost, there are a bunch of reductions to do */
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static void
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bi_emit_flog2_new(bi_context *ctx, nir_alu_instr *instr)
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{
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/* LOG_FREXPE X */
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bi_instruction frexpe = {
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.type = BI_FREXP,
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.op = { .frexp = BI_FREXPE_LOG },
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_int32,
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.src = { pan_src_index(&instr->src[0].src) },
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.src_types = { nir_type_float32 },
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.swizzle = { { instr->src[0].swizzle[0] } }
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};
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/* I32_TO_F32 m */
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bi_instruction i2f = {
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.type = BI_CONVERT,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_float32,
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.src = { frexpe.dest },
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.src_types = { nir_type_int32 },
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.round = BI_ROUND_RTZ
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};
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/* ADD_FREXPM (x-1), -1.0, X */
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bi_instruction x_minus_1 = {
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.type = BI_REDUCE_FMA,
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.op = { .reduce = BI_REDUCE_ADD_FREXPM },
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_float32,
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.src = {
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BIR_INDEX_CONSTANT,
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pan_src_index(&instr->src[0].src),
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},
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.src_types = { nir_type_float32, nir_type_float32 },
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.constant = {
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.u64 = 0xBF800000 /* -1.0 */
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},
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.swizzle = { {}, { instr->src[0].swizzle[0] } }
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};
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/* FLOG2_HELP log2(x)/(x-1), x */
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bi_instruction help = {
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.type = BI_TABLE,
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.op = { .table = BI_TABLE_LOG2_U_OVER_U_1_LOW },
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_float32,
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.src = { pan_src_index(&instr->src[0].src) },
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.src_types = { nir_type_float32 },
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.swizzle = { { instr->src[0].swizzle[0] } }
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};
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/* FMA log2(x)/(x - 1), (x - 1), M */
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bi_instruction fma = {
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.type = BI_FMA,
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.dest = pan_dest_index(&instr->dest.dest),
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.dest_type = nir_type_float32,
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.src = {
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help.dest,
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x_minus_1.dest,
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i2f.dest
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},
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.src_types = {
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nir_type_float32,
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nir_type_float32,
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nir_type_float32
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}
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};
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bi_emit(ctx, frexpe);
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bi_emit(ctx, i2f);
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bi_emit(ctx, x_minus_1);
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bi_emit(ctx, help);
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bi_emit(ctx, fma);
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}
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void
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bi_emit_fexp2(bi_context *ctx, nir_alu_instr *instr)
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{
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/* TODO: G71 */
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bi_emit_fexp2_new(ctx, instr);
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}
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void
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bi_emit_flog2(bi_context *ctx, nir_alu_instr *instr)
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{
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/* TODO: G71 */
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bi_emit_flog2_new(ctx, instr);
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}
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void
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bi_emit_deriv(bi_context *ctx, nir_alu_instr *instr)
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{
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bi_instruction cur_lane = {
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.type = BI_MOV,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_uint32,
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.src = { BIR_INDEX_FAU | BIR_FAU_LANE_ID },
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.src_types = { nir_type_uint32 }
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};
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bi_instruction lane1 = {
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.type = BI_BITWISE,
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.op.bitwise = BI_BITWISE_AND,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_uint32,
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.src = {
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cur_lane.dest,
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BIR_INDEX_CONSTANT | 0,
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BIR_INDEX_ZERO,
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},
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.src_types = {
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nir_type_uint32,
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nir_type_uint32,
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nir_type_uint8,
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},
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.constant.u64 = instr->op == nir_op_fddx ? 2 : 1,
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};
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bi_instruction lane2 = {
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.type = BI_IMATH,
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.op.imath = BI_IMATH_ADD,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_uint32,
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.src = {
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lane1.dest,
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BIR_INDEX_CONSTANT | 0,
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BIR_INDEX_ZERO,
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},
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.src_types = {
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nir_type_uint32,
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nir_type_uint32,
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nir_type_uint32,
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},
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.constant.u64 = instr->op == nir_op_fddx ? 1 : 2,
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};
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unsigned src = pan_src_index(&instr->src[0].src);
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bi_instruction clper1 = {
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.type = BI_SPECIAL_ADD,
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.op.special = ctx->arch == 6 ? BI_SPECIAL_CLPER_V6 : BI_SPECIAL_CLPER_V7,
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.special.subgroup_sz = BI_SUBGROUP_SUBGROUP4,
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.special.clper.lane_op_mod = BI_LANE_OP_NONE,
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.special.clper.inactive_res = BI_INACTIVE_RESULT_ZERO,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_uint32,
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.src = { src, lane1.dest },
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.src_types = { nir_type_uint32, nir_type_uint32 },
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.swizzle[0][0] = instr->src[0].swizzle[0],
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};
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bi_instruction clper2 = {
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.type = BI_SPECIAL_ADD,
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.op.special = ctx->arch == 6 ? BI_SPECIAL_CLPER_V6 : BI_SPECIAL_CLPER_V7,
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.special.subgroup_sz = BI_SUBGROUP_SUBGROUP4,
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.special.clper.lane_op_mod = BI_LANE_OP_NONE,
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.special.clper.inactive_res = BI_INACTIVE_RESULT_ZERO,
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.dest = bi_make_temp(ctx),
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.dest_type = nir_type_uint32,
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.src = { src, lane2.dest },
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.src_types = { nir_type_uint32, nir_type_uint32 },
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.swizzle[0][0] = instr->src[0].swizzle[0],
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};
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nir_alu_type type = nir_type_float |
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nir_dest_bit_size(instr->dest.dest);
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bi_instruction sub = {
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.type = BI_ADD,
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.src = { clper2.dest, clper1.dest },
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.src_types = { type, type },
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.src_neg[1] = true,
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.dest = pan_dest_index(&instr->dest.dest),
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.dest_type = type,
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};
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bi_emit(ctx, cur_lane);
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bi_emit(ctx, lane1);
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bi_emit(ctx, lane2);
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bi_emit(ctx, clper1);
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bi_emit(ctx, clper2);
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bi_emit(ctx, sub);
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}
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File diff suppressed because it is too large
Load Diff
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@ -1059,12 +1059,6 @@ pan_next_block(pan_block *block)
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return list_first_entry(&(block->link), pan_block, link);
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}
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/* Special functions */
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void bi_emit_fexp2(bi_context *ctx, nir_alu_instr *instr);
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void bi_emit_flog2(bi_context *ctx, nir_alu_instr *instr);
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void bi_emit_deriv(bi_context *ctx, nir_alu_instr *instr);
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/* BIR manipulation */
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bool bi_has_clamp(bi_instruction *ins);
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@ -27,7 +27,6 @@ libpanfrost_bifrost_files = files(
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'bi_pack.c',
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'bi_ra.c',
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'bi_schedule.c',
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'bi_special.c',
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'bi_tables.c',
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'bir.c',
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'bifrost_compile.c',
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