KonstantinSeurer
/
mesa
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

freedreno: reduce extra height alignment in a6xx layout 

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4611>
This commit is contained in:
Jonathan Marek 2020-05-12 21:58:20 -04:00 committed by Marge Bot
parent f6f8a19092
commit e49748521e
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/freedreno/fdl/fd6_layout.c
View File

@ -169,14 +169,14 @@ fdl6_layout(struct fdl_layout *layout,
nblocksy = align(nblocksy, ta->heightalign);
/* The blits used for mem<->gmem work at a granularity of
* 32x32, which can cause faults due to over-fetch on the
* 16x4, which can cause faults due to over-fetch on the
* last level. The simple solution is to over-allocate a
* bit the last level to ensure any over-fetch is harmless.
* The pitch is already sufficiently aligned, but height
* may not be:
* may not be. note this only matters if last level is linear
*/
if (level == mip_levels - 1)
nblocksy = align(nblocksy, 32);
height = align(nblocksy, 4);
uint32_t nblocksx =
util_align_npot(util_format_get_nblocksx(format, u_minify(pitch0, level)),