glsl/lower_instructions: Handle fp16 for FDIV_TO_MUL_RCP
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3929>
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@ -63,7 +63,8 @@
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* reciprocal. By breaking the operation down, constant reciprocals
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* can get constant folded.
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*
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* FDIV_TO_MUL_RCP only lowers single-precision floating point division;
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* FDIV_TO_MUL_RCP lowers single-precision and half-precision
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* floating point division;
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* DDIV_TO_MUL_RCP only lowers double-precision floating point division.
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* DIV_TO_MUL_RCP is a convenience macro that sets both flags.
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* INT_DIV_TO_MUL_RCP handles the integer case, converting to and from floating
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@ -209,7 +210,7 @@ lower_instructions_visitor::sub_to_add_neg(ir_expression *ir)
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void
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lower_instructions_visitor::div_to_mul_rcp(ir_expression *ir)
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{
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assert(ir->operands[1]->type->is_float() || ir->operands[1]->type->is_double());
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assert(ir->operands[1]->type->is_float_16_32_64());
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/* New expression for the 1.0 / op1 */
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ir_rvalue *expr;
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@ -342,7 +343,7 @@ lower_instructions_visitor::mod_to_floor(ir_expression *ir)
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/* Don't generate new IR that would need to be lowered in an additional
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* pass.
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*/
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if ((lowering(FDIV_TO_MUL_RCP) && ir->type->is_float()) ||
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if ((lowering(FDIV_TO_MUL_RCP) && ir->type->is_float_16_32()) ||
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(lowering(DDIV_TO_MUL_RCP) && ir->type->is_double()))
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div_to_mul_rcp(div_expr);
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@ -1773,7 +1774,7 @@ lower_instructions_visitor::visit_leave(ir_expression *ir)
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case ir_binop_div:
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if (ir->operands[1]->type->is_integer_32() && lowering(INT_DIV_TO_MUL_RCP))
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int_div_to_mul_rcp(ir);
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else if ((ir->operands[1]->type->is_float() && lowering(FDIV_TO_MUL_RCP)) ||
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else if ((ir->operands[1]->type->is_float_16_32() && lowering(FDIV_TO_MUL_RCP)) ||
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(ir->operands[1]->type->is_double() && lowering(DDIV_TO_MUL_RCP)))
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div_to_mul_rcp(ir);
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break;
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