From e3bc78b8e398348bc1993b1c713b8917bd4d53d9 Mon Sep 17 00:00:00 2001
From: Erik Faye-Lund <erik.faye-lund@collabora.com>
Date: Wed, 8 Jun 2022 10:07:15 +0200
Subject: [PATCH] util: use c11 alignas instead of rolling our own

Due to how alignas is defined, it itsn't allowed to use it on a struct,
it needs to be used on the first member instead. So move the declaration
in those cases.

This still leaves the ALIGN16 macro using compiler-specific directives,
because it's a lot of work to untangle the above. This probably deserves
its own MR.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16908>
---
 src/util/macros.h       |  1 +
 src/util/ralloc.c       | 34 ++++++++++++++--------------------
 src/util/sparse_array.h | 10 ++--------
 src/util/u_cpu_detect.c |  2 +-
 4 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/src/util/macros.h b/src/util/macros.h
index e0af384f7b9..e978007df6b 100644
--- a/src/util/macros.h
+++ b/src/util/macros.h
@@ -413,6 +413,7 @@ u_uintN_max(unsigned bit_size)
 #ifndef __cplusplus
 #ifdef _MSC_VER
 #define alignof _Alignof
+#define alignas _Alignas
 #else
 #include <stdalign.h>
 #endif
diff --git a/src/util/ralloc.c b/src/util/ralloc.c
index 5ffc91ca823..35740655613 100644
--- a/src/util/ralloc.c
+++ b/src/util/ralloc.c
@@ -41,20 +41,14 @@
  * 64-bit), avoiding performance penalities on x86 and alignment faults on
  * ARM.
  */
-struct
-#ifdef _MSC_VER
-#if _WIN64
-__declspec(align(16))
-#else
- __declspec(align(8))
-#endif
-#elif defined(__LP64__)
- __attribute__((aligned(16)))
-#else
- __attribute__((aligned(8)))
-#endif
-   ralloc_header
+struct ralloc_header
 {
+#if defined(__LP64__) || defined(_WIN64)
+   alignas(16)
+#else
+   alignas(8)
+#endif
+
 #ifndef NDEBUG
    /* A canary value used to determine whether a pointer is ralloc'd. */
    unsigned canary;
@@ -554,15 +548,15 @@ ralloc_vasprintf_rewrite_tail(char **str, size_t *start, const char *fmt,
 #define SUBALLOC_ALIGNMENT 8
 #define LMAGIC 0x87b9c7d3
 
-struct
-#ifdef _MSC_VER
- __declspec(align(8))
-#elif defined(__LP64__)
- __attribute__((aligned(16)))
+struct linear_header {
+
+   /* align first member to align struct */
+#if defined(__LP64__) || defined(_WIN64)
+   alignas(16)
 #else
- __attribute__((aligned(8)))
+   alignas(8)
 #endif
-   linear_header {
+
 #ifndef NDEBUG
    unsigned magic;   /* for debugging */
 #endif
diff --git a/src/util/sparse_array.h b/src/util/sparse_array.h
index f91fe21dae2..3df45a54644 100644
--- a/src/util/sparse_array.h
+++ b/src/util/sparse_array.h
@@ -87,13 +87,7 @@ void util_sparse_array_validate(struct util_sparse_array *arr);
  * "free" elements backed by a util_sparse_array.  The list supports only two
  * operations: push and pop both of which are thread-safe and lock-free.  T
  */
-struct
-#ifdef _MSC_VER
- __declspec(align(8))
-#else
- __attribute__((aligned(8)))
-#endif
-util_sparse_array_free_list
+struct util_sparse_array_free_list
 {
    /** Head of the list
     *
@@ -103,7 +97,7 @@ util_sparse_array_free_list
     * We want this element to be 8-byte aligned.  Otherwise, the performance
     * of atomic operations on it will be aweful on 32-bit platforms.
     */
-   uint64_t head;
+   alignas(8) uint64_t head;
 
    /** The array backing this free list */
    struct util_sparse_array *arr;
diff --git a/src/util/u_cpu_detect.c b/src/util/u_cpu_detect.c
index fb96e1042bd..4d65804561a 100644
--- a/src/util/u_cpu_detect.c
+++ b/src/util/u_cpu_detect.c
@@ -365,7 +365,7 @@ PIPE_ALIGN_STACK static inline boolean sse2_has_daz(void)
       uint32_t pad1[7];
       uint32_t mxcsr_mask;
       uint32_t pad2[128-8];
-   } PIPE_ALIGN_VAR(16) fxarea;
+   } alignas(16) fxarea;
 
    fxarea.mxcsr_mask = 0;
 #if defined(PIPE_CC_GCC)