radeonsi: convert stencil ref state into an atom
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
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c44de30979
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e21418f221
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@ -53,7 +53,7 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op)
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util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
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util_blitter_save_blend(sctx->blitter, sctx->queued.named.blend);
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util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
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util_blitter_save_depth_stencil_alpha(sctx->blitter, sctx->queued.named.dsa);
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util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref);
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util_blitter_save_stencil_ref(sctx->blitter, &sctx->stencil_ref.state);
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util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
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util_blitter_save_rasterizer(sctx->blitter, sctx->queued.named.rasterizer);
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util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader);
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util_blitter_save_fragment_shader(sctx->blitter, sctx->ps_shader);
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util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
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util_blitter_save_geometry_shader(sctx->blitter, sctx->gs_shader);
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@ -195,6 +195,7 @@ void si_begin_new_cs(struct si_context *ctx)
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si_mark_atom_dirty(ctx, &ctx->sample_mask.atom);
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si_mark_atom_dirty(ctx, &ctx->sample_mask.atom);
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si_mark_atom_dirty(ctx, &ctx->blend_color.atom);
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si_mark_atom_dirty(ctx, &ctx->blend_color.atom);
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si_mark_atom_dirty(ctx, &ctx->db_render_state);
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si_mark_atom_dirty(ctx, &ctx->db_render_state);
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si_mark_atom_dirty(ctx, &ctx->stencil_ref.atom);
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si_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom);
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si_mark_atom_dirty(ctx, &ctx->b.streamout.enable_atom);
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si_all_descriptors_begin_new_cs(ctx);
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si_all_descriptors_begin_new_cs(ctx);
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@ -177,7 +177,6 @@ struct si_context {
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struct si_framebuffer framebuffer;
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struct si_framebuffer framebuffer;
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struct si_vertex_element *vertex_elements;
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struct si_vertex_element *vertex_elements;
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/* for saving when using blitter */
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/* for saving when using blitter */
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struct pipe_stencil_ref stencil_ref;
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/* shaders */
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/* shaders */
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struct si_shader_selector *ps_shader;
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struct si_shader_selector *ps_shader;
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struct si_shader_selector *gs_shader;
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struct si_shader_selector *gs_shader;
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@ -198,6 +197,7 @@ struct si_context {
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unsigned border_color_offset;
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unsigned border_color_offset;
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struct si_blend_color blend_color;
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struct si_blend_color blend_color;
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struct si_stencil_ref stencil_ref;
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struct si_scissors scissors;
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struct si_scissors scissors;
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struct si_viewports viewports;
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struct si_viewports viewports;
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struct si_clip_state clip_state;
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struct si_clip_state clip_state;
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@ -825,39 +825,33 @@ static void si_delete_rs_state(struct pipe_context *ctx, void *state)
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/*
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/*
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* infeered state between dsa and stencil ref
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* infeered state between dsa and stencil ref
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*/
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*/
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static void si_update_dsa_stencil_ref(struct si_context *sctx)
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static void si_emit_stencil_ref(struct si_context *sctx, struct r600_atom *atom)
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{
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{
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struct si_pm4_state *pm4;
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struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
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struct pipe_stencil_ref *ref = &sctx->stencil_ref;
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struct pipe_stencil_ref *ref = &sctx->stencil_ref.state;
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struct si_state_dsa *dsa = sctx->queued.named.dsa;
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struct si_dsa_stencil_ref_part *dsa = &sctx->stencil_ref.dsa_part;
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if (!dsa)
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r600_write_context_reg_seq(cs, R_028430_DB_STENCILREFMASK, 2);
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return;
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radeon_emit(cs, S_028430_STENCILTESTVAL(ref->ref_value[0]) |
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S_028430_STENCILMASK(dsa->valuemask[0]) |
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pm4 = CALLOC_STRUCT(si_pm4_state);
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S_028430_STENCILWRITEMASK(dsa->writemask[0]) |
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if (pm4 == NULL)
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S_028430_STENCILOPVAL(1));
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return;
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radeon_emit(cs, S_028434_STENCILTESTVAL_BF(ref->ref_value[1]) |
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S_028434_STENCILMASK_BF(dsa->valuemask[1]) |
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si_pm4_set_reg(pm4, R_028430_DB_STENCILREFMASK,
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S_028434_STENCILWRITEMASK_BF(dsa->writemask[1]) |
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S_028430_STENCILTESTVAL(ref->ref_value[0]) |
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S_028434_STENCILOPVAL_BF(1));
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S_028430_STENCILMASK(dsa->valuemask[0]) |
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S_028430_STENCILWRITEMASK(dsa->writemask[0]) |
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S_028430_STENCILOPVAL(1));
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si_pm4_set_reg(pm4, R_028434_DB_STENCILREFMASK_BF,
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S_028434_STENCILTESTVAL_BF(ref->ref_value[1]) |
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S_028434_STENCILMASK_BF(dsa->valuemask[1]) |
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S_028434_STENCILWRITEMASK_BF(dsa->writemask[1]) |
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S_028434_STENCILOPVAL_BF(1));
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si_pm4_set_state(sctx, dsa_stencil_ref, pm4);
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}
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}
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static void si_set_pipe_stencil_ref(struct pipe_context *ctx,
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static void si_set_stencil_ref(struct pipe_context *ctx,
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const struct pipe_stencil_ref *state)
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const struct pipe_stencil_ref *state)
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{
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{
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struct si_context *sctx = (struct si_context *)ctx;
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struct si_context *sctx = (struct si_context *)ctx;
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sctx->stencil_ref = *state;
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si_update_dsa_stencil_ref(sctx);
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if (memcmp(&sctx->stencil_ref.state, state, sizeof(*state)) == 0)
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return;
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sctx->stencil_ref.state = *state;
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si_mark_atom_dirty(sctx, &sctx->stencil_ref.atom);
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}
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}
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@ -904,10 +898,10 @@ static void *si_create_dsa_state(struct pipe_context *ctx,
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return NULL;
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return NULL;
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}
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}
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dsa->valuemask[0] = state->stencil[0].valuemask;
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dsa->stencil_ref.valuemask[0] = state->stencil[0].valuemask;
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dsa->valuemask[1] = state->stencil[1].valuemask;
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dsa->stencil_ref.valuemask[1] = state->stencil[1].valuemask;
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dsa->writemask[0] = state->stencil[0].writemask;
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dsa->stencil_ref.writemask[0] = state->stencil[0].writemask;
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dsa->writemask[1] = state->stencil[1].writemask;
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dsa->stencil_ref.writemask[1] = state->stencil[1].writemask;
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db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) |
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db_depth_control = S_028800_Z_ENABLE(state->depth.enabled) |
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S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
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S_028800_Z_WRITE_ENABLE(state->depth.writemask) |
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@ -960,7 +954,12 @@ static void si_bind_dsa_state(struct pipe_context *ctx, void *state)
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return;
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return;
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si_pm4_bind_state(sctx, dsa, dsa);
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si_pm4_bind_state(sctx, dsa, dsa);
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si_update_dsa_stencil_ref(sctx);
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if (memcmp(&dsa->stencil_ref, &sctx->stencil_ref.dsa_part,
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sizeof(struct si_dsa_stencil_ref_part)) != 0) {
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sctx->stencil_ref.dsa_part = dsa->stencil_ref;
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si_mark_atom_dirty(sctx, &sctx->stencil_ref.atom);
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}
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}
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}
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static void si_delete_dsa_state(struct pipe_context *ctx, void *state)
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static void si_delete_dsa_state(struct pipe_context *ctx, void *state)
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@ -3069,6 +3068,7 @@ void si_init_state_functions(struct si_context *sctx)
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si_init_atom(sctx, &sctx->clip_state.atom, &sctx->atoms.s.clip_state, si_emit_clip_state, 2+6*4);
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si_init_atom(sctx, &sctx->clip_state.atom, &sctx->atoms.s.clip_state, si_emit_clip_state, 2+6*4);
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si_init_atom(sctx, &sctx->scissors.atom, &sctx->atoms.s.scissors, si_emit_scissors, 16*4);
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si_init_atom(sctx, &sctx->scissors.atom, &sctx->atoms.s.scissors, si_emit_scissors, 16*4);
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si_init_atom(sctx, &sctx->viewports.atom, &sctx->atoms.s.viewports, si_emit_viewports, 16*8);
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si_init_atom(sctx, &sctx->viewports.atom, &sctx->atoms.s.viewports, si_emit_viewports, 16*8);
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si_init_atom(sctx, &sctx->stencil_ref.atom, &sctx->atoms.s.stencil_ref, si_emit_stencil_ref, 4);
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sctx->b.b.create_blend_state = si_create_blend_state;
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sctx->b.b.create_blend_state = si_create_blend_state;
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sctx->b.b.bind_blend_state = si_bind_blend_state;
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sctx->b.b.bind_blend_state = si_bind_blend_state;
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@ -3091,7 +3091,7 @@ void si_init_state_functions(struct si_context *sctx)
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sctx->b.b.set_clip_state = si_set_clip_state;
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sctx->b.b.set_clip_state = si_set_clip_state;
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sctx->b.b.set_scissor_states = si_set_scissor_states;
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sctx->b.b.set_scissor_states = si_set_scissor_states;
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sctx->b.b.set_viewport_states = si_set_viewport_states;
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sctx->b.b.set_viewport_states = si_set_viewport_states;
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sctx->b.b.set_stencil_ref = si_set_pipe_stencil_ref;
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sctx->b.b.set_stencil_ref = si_set_stencil_ref;
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sctx->b.b.set_framebuffer_state = si_set_framebuffer_state;
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sctx->b.b.set_framebuffer_state = si_set_framebuffer_state;
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sctx->b.b.get_sample_position = cayman_get_sample_position;
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sctx->b.b.get_sample_position = cayman_get_sample_position;
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@ -60,13 +60,23 @@ struct si_state_rasterizer {
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bool poly_smooth;
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bool poly_smooth;
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};
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};
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struct si_state_dsa {
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struct si_dsa_stencil_ref_part {
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struct si_pm4_state pm4;
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unsigned alpha_func;
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uint8_t valuemask[2];
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uint8_t valuemask[2];
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uint8_t writemask[2];
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uint8_t writemask[2];
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};
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};
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struct si_state_dsa {
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struct si_pm4_state pm4;
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unsigned alpha_func;
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struct si_dsa_stencil_ref_part stencil_ref;
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};
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struct si_stencil_ref {
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struct r600_atom atom;
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struct pipe_stencil_ref state;
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struct si_dsa_stencil_ref_part dsa_part;
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};
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struct si_vertex_element
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struct si_vertex_element
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{
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{
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unsigned count;
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unsigned count;
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@ -82,7 +92,6 @@ union si_state {
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struct si_state_dsa *dsa;
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struct si_state_dsa *dsa;
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struct si_pm4_state *fb_rs;
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struct si_pm4_state *fb_rs;
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struct si_pm4_state *fb_blend;
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struct si_pm4_state *fb_blend;
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struct si_pm4_state *dsa_stencil_ref;
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struct si_pm4_state *ta_bordercolor_base;
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struct si_pm4_state *ta_bordercolor_base;
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struct si_pm4_state *ls;
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struct si_pm4_state *ls;
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struct si_pm4_state *hs;
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struct si_pm4_state *hs;
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@ -113,6 +122,7 @@ union si_state_atoms {
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struct r600_atom *shader_userdata;
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struct r600_atom *shader_userdata;
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struct r600_atom *scissors;
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struct r600_atom *scissors;
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struct r600_atom *viewports;
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struct r600_atom *viewports;
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struct r600_atom *stencil_ref;
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} s;
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} s;
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struct r600_atom *array[0];
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struct r600_atom *array[0];
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};
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};
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