freedreno/a6xx: add missing flush/invalidates for blit

Various things we were missing for multiple blits in a single batch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
Rob Clark 2019-07-30 09:34:53 -07:00
parent d8379da19e
commit e1790c532a
2 changed files with 9 additions and 15 deletions

View File

@ -172,21 +172,14 @@ can_do_blit(const struct pipe_blit_info *info)
}
static void
emit_setup(struct fd_ringbuffer *ring)
emit_setup(struct fd_batch *batch)
{
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
struct fd_ringbuffer *ring = batch->draw;
OUT_PKT7(ring, CP_EVENT_WRITE, 1);
OUT_RING(ring, LRZ_FLUSH);
OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
OUT_RING(ring, 0x0);
OUT_WFI5(ring);
OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
OUT_RING(ring, 0x10000000);
fd6_event_write(batch, ring, 0x1d, true);
fd6_event_write(batch, ring, FACENESS_FLUSH, true);
fd6_event_write(batch, ring, PC_CCU_INVALIDATE_COLOR, false);
fd6_event_write(batch, ring, PC_CCU_INVALIDATE_DEPTH, false);
}
static uint32_t
@ -677,7 +670,7 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
mtx_unlock(&ctx->screen->lock);
emit_setup(batch->draw);
emit_setup(batch);
if ((info->src.resource->target == PIPE_BUFFER) &&
(info->dst.resource->target == PIPE_BUFFER)) {
@ -694,6 +687,7 @@ handle_rgba_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
fd6_event_write(batch, batch->draw, 0x1d, true);
fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
fd6_cache_inv(batch, batch->draw);
fd_resource(info->dst.resource)->valid = true;
batch->needs_flush = true;

View File

@ -146,7 +146,7 @@ fd6_event_write(struct fd_batch *batch, struct fd_ringbuffer *ring,
static inline void
fd6_cache_inv(struct fd_batch *batch, struct fd_ringbuffer *ring)
{
fd6_event_write(batch, ring, 0x31, false);
fd6_event_write(batch, ring, CACHE_INVALIDATE, false);
}
static inline void