radv: fix pipeline caching with robust buffer access
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12900>
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@ -235,6 +235,10 @@ get_hash_flags(const struct radv_device *device, bool stats)
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hash_flags |= RADV_HASH_SHADER_FORCE_VRS_2x1;
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if (device->force_vrs != RADV_FORCE_VRS_1x2)
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hash_flags |= RADV_HASH_SHADER_FORCE_VRS_1x2;
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if (device->robust_buffer_access) /* forces per-attribute vertex descriptors */
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hash_flags |= RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS;
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if (device->robust_buffer_access2) /* affects load/store vectorizer */
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hash_flags |= RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS2;
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return hash_flags;
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}
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@ -1677,6 +1677,8 @@ struct radv_event {
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#define RADV_HASH_SHADER_FORCE_VRS_2x1 (1 << 10)
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#define RADV_HASH_SHADER_FORCE_VRS_1x2 (1 << 11)
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#define RADV_HASH_SHADER_FORCE_NGG_CULLING (1 << 13)
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#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS (1 << 14)
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#define RADV_HASH_SHADER_ROBUST_BUFFER_ACCESS2 (1 << 15)
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void radv_hash_shaders(unsigned char *hash, const VkPipelineShaderStageCreateInfo **stages,
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const struct radv_pipeline_layout *layout,
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