ac/nir: replace SI.buffer.load.dword with amdgcn.buffer.load
The old one generates useless instructions in there, found while comparing geometry shaders between RadeonSI and RADV. This improves all Vulkan demos that use geometry shaders, +4% for deferredshadows, +9% for viewportarray, +7% for geometryshader on Polaris10. This seems to also improve DOW3 a little bit (+1%). Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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@ -3047,7 +3047,6 @@ load_gs_input(struct ac_shader_abi *abi,
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{
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struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
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LLVMValueRef vtx_offset;
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LLVMValueRef args[9];
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unsigned param, vtx_offset_param;
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LLVMValueRef value[4], result;
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@ -3065,20 +3064,16 @@ load_gs_input(struct ac_shader_abi *abi,
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LLVMConstInt(ctx->ac.i32, param * 4 + i + const_index, 0), "");
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value[i] = ac_lds_load(&ctx->ac, dw_addr);
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} else {
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args[0] = ctx->esgs_ring;
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args[1] = vtx_offset;
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args[2] = LLVMConstInt(ctx->ac.i32, (param * 4 + i + const_index) * 256, false);
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args[3] = ctx->ac.i32_0;
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args[4] = ctx->ac.i32_1; /* OFFEN */
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args[5] = ctx->ac.i32_0; /* IDXEN */
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args[6] = ctx->ac.i32_1; /* GLC */
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args[7] = ctx->ac.i32_0; /* SLC */
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args[8] = ctx->ac.i32_0; /* TFE */
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LLVMValueRef soffset =
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LLVMConstInt(ctx->ac.i32,
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(param * 4 + i + const_index) * 256,
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false);
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value[i] = ac_build_intrinsic(&ctx->ac, "llvm.SI.buffer.load.dword.i32.i32",
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ctx->ac.i32, args, 9,
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AC_FUNC_ATTR_READONLY |
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AC_FUNC_ATTR_LEGACY);
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value[i] = ac_build_buffer_load(&ctx->ac,
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ctx->esgs_ring, 1,
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ctx->ac.i32_0,
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vtx_offset, soffset,
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0, 1, 0, true, false);
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}
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}
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result = ac_build_varying_gather_values(&ctx->ac, value, num_components, component);
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@ -7166,16 +7161,9 @@ void ac_compile_nir_shader(LLVMTargetMachineRef tm,
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static void
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ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
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{
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LLVMValueRef args[9];
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args[0] = ctx->gsvs_ring;
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args[1] = LLVMBuildMul(ctx->builder, ctx->abi.vertex_id, LLVMConstInt(ctx->ac.i32, 4, false), "");
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args[3] = ctx->ac.i32_0;
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args[4] = ctx->ac.i32_1; /* OFFEN */
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args[5] = ctx->ac.i32_0; /* IDXEN */
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args[6] = ctx->ac.i32_1; /* GLC */
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args[7] = ctx->ac.i32_1; /* SLC */
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args[8] = ctx->ac.i32_0; /* TFE */
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LLVMValueRef vtx_offset =
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LLVMBuildMul(ctx->builder, ctx->abi.vertex_id,
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LLVMConstInt(ctx->ac.i32, 4, false), "");
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int idx = 0;
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for (unsigned i = 0; i < RADEON_LLVM_MAX_OUTPUTS; ++i) {
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@ -7193,16 +7181,16 @@ ac_gs_copy_shader_emit(struct nir_to_llvm_context *ctx)
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}
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for (unsigned j = 0; j < length; j++) {
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LLVMValueRef value;
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args[2] = LLVMConstInt(ctx->ac.i32,
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LLVMValueRef value, soffset;
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soffset = LLVMConstInt(ctx->ac.i32,
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(slot * 4 + j) *
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ctx->gs_max_out_vertices * 16 * 4, false);
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value = ac_build_intrinsic(&ctx->ac,
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"llvm.SI.buffer.load.dword.i32.i32",
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ctx->ac.i32, args, 9,
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AC_FUNC_ATTR_READONLY |
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AC_FUNC_ATTR_LEGACY);
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value = ac_build_buffer_load(&ctx->ac, ctx->gsvs_ring,
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1, ctx->ac.i32_0,
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vtx_offset, soffset,
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0, 1, 1, true, false);
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LLVMBuildStore(ctx->builder,
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ac_to_float(&ctx->ac, value), ctx->nir->outputs[radeon_llvm_reg_index_soa(i, j)]);
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