nv50: always keep TSC slot 0 bound
All TXF operations implicitly use sampler 0, and fail if it's not bound to anything. This does not happen in LINKED_TSC mode, but we don't currently use this. We ensure that TSC entry at id 0 has the SRGB conversion bit enabled (and all samplers we normally generate will too). Then when the TSC at *slot* 0 (not to be confused with entry 0 in the global TSC table) is unbound, we bind it to entry 0. This way, TXF operations are not dependent on there being a regular sampler bound there. Fixes arb_texture_buffer_object-subdata-sync among others. (TBO's are particularly susceptible to this as they don't bind a sampler.) Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
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@ -379,6 +379,15 @@ nv50_create(struct pipe_screen *pscreen, void *priv, unsigned ctxflags)
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util_dynarray_init(&nv50->global_residents, NULL);
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// Make sure that the first TSC entry has SRGB conversion bit set, since we
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// use it as a fallback.
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if (!screen->tsc.entries[0])
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nv50_upload_tsc0(nv50);
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// And mark samplers as dirty so that the first slot would get bound to the
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// zero entry if it's not otherwise set.
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nv50->dirty_3d |= NV50_NEW_3D_SAMPLERS;
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return pipe;
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out_err:
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@ -256,6 +256,7 @@ extern void nv50_init_surface_functions(struct nv50_context *);
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void nv50_validate_textures(struct nv50_context *);
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void nv50_validate_samplers(struct nv50_context *);
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void nv50_upload_ms_info(struct nouveau_pushbuf *);
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void nv50_upload_tsc0(struct nv50_context *);
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struct pipe_sampler_view *
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nv50_create_texture_view(struct pipe_context *,
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@ -380,6 +380,16 @@ nv50_validate_tsc(struct nv50_context *nv50, int s)
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}
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nv50->state.num_samplers[s] = nv50->num_samplers[s];
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// TXF, in unlinked tsc mode, will always use sampler 0. So we have to
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// ensure that it remains bound. Its contents don't matter, all samplers we
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// ever create have the SRGB_CONVERSION bit set, so as long as the first
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// entry is initialized, we're good to go. This is the only bit that has
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// any effect on what TXF does.
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if (!nv50->samplers[s][0]) {
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BEGIN_NV04(push, NV50_3D(BIND_TSC(s)), 1);
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PUSH_DATA (push, 1);
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}
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return need_flush;
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}
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@ -451,3 +461,14 @@ void nv50_upload_ms_info(struct nouveau_pushbuf *push)
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BEGIN_NI04(push, NV50_3D(CB_DATA(0)), ARRAY_SIZE(msaa_sample_xy_offsets));
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PUSH_DATAp(push, msaa_sample_xy_offsets, ARRAY_SIZE(msaa_sample_xy_offsets));
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}
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void nv50_upload_tsc0(struct nv50_context *nv50)
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{
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struct nouveau_pushbuf *push = nv50->base.pushbuf;
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u32 data[8] = { G80_TSC_0_SRGB_CONVERSION };
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nv50_sifc_linear_u8(&nv50->base, nv50->screen->txc,
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65536 /* + tsc->id * 32 */,
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NOUVEAU_BO_VRAM, 32, data);
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BEGIN_NV04(push, NV50_3D(TSC_FLUSH), 1);
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PUSH_DATA (push, 0);
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}
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