swr: [rasterizer jitter] add support for component packing for 'odd' formats
Add early-out if no components are enabled. Add asserts. Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
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@ -269,6 +269,9 @@ void FetchJit::JitLoadVertices(const FETCH_COMPILE_STATE &fetchState, Value* fet
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uint32_t numComponents = info.numComps;
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uint32_t numComponents = info.numComps;
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uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix.
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uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix.
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// load path doesn't support component packing
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SWR_ASSERT(ied.ComponentPacking == ComponentEnable::XYZW, "Fetch load path doesn't support component packing.");
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vectors.clear();
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vectors.clear();
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Value *vCurIndices;
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Value *vCurIndices;
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@ -699,6 +702,13 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f
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for(uint32_t nInputElt = 0; nInputElt < fetchState.numAttribs; ++nInputElt)
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for(uint32_t nInputElt = 0; nInputElt < fetchState.numAttribs; ++nInputElt)
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{
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{
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const INPUT_ELEMENT_DESC& ied = fetchState.layout[nInputElt];
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const INPUT_ELEMENT_DESC& ied = fetchState.layout[nInputElt];
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// skip element if all components are disabled
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if (ied.ComponentPacking == ComponentEnable::NONE)
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{
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continue;
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}
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const SWR_FORMAT_INFO &info = GetFormatInfo((SWR_FORMAT)ied.Format);
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const SWR_FORMAT_INFO &info = GetFormatInfo((SWR_FORMAT)ied.Format);
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SWR_ASSERT((info.bpp != 0), "Unsupported format in JitGatherVertices.");
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SWR_ASSERT((info.bpp != 0), "Unsupported format in JitGatherVertices.");
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uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix.
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uint32_t bpc = info.bpp / info.numComps; ///@todo Code below assumes all components are same size. Need to fix.
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@ -789,14 +799,23 @@ void FetchJit::JitGatherVertices(const FETCH_COMPILE_STATE &fetchState, Value* f
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// Special gather/conversion for formats without equal component sizes
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// Special gather/conversion for formats without equal component sizes
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if (IsOddFormat((SWR_FORMAT)ied.Format))
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if (IsOddFormat((SWR_FORMAT)ied.Format))
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{
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{
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// Only full 4 component fetch is supported for odd formats
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SWR_ASSERT(compMask == XYZW);
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Value* pResults[4];
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Value* pResults[4];
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CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase, vOffsets, pResults);
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CreateGatherOddFormats((SWR_FORMAT)ied.Format, pStreamBase, vOffsets, pResults);
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ConvertFormat((SWR_FORMAT)ied.Format, pResults);
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ConvertFormat((SWR_FORMAT)ied.Format, pResults);
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StoreVertexElements(pVtxOut, outputElt++, 4, pResults);
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for (uint32_t c = 0; c < 4; ++c)
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currentVertexElement = 0;
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{
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if (isComponentEnabled(compMask, c))
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{
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vVertexElements[currentVertexElement++] = pResults[c];
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if (currentVertexElement > 3)
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{
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StoreVertexElements(pVtxOut, outputElt++, 4, vVertexElements);
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// reset to the next vVertexElement to output
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currentVertexElement = 0;
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}
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}
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}
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}
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}
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else if(info.type[0] == SWR_TYPE_FLOAT)
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else if(info.type[0] == SWR_TYPE_FLOAT)
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{
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{
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