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i965: add EXT_polygon_offset_clamp support to gen4/gen5 

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Ilia Mirkin 2015-06-19 13:36:15 -07:00 committed by Matt Turner
parent 833fa9a8cd
commit dbae576f7f
7 changed files with 30 additions and 9 deletions
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1
src/mesa/drivers/dri/i965/brw_clip.c
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@ -223,6 +223,7 @@ brw_upload_clip_prog(struct brw_context *brw)
/* _NEW_POLYGON, _NEW_BUFFERS */
key.offset_units = ctx->Polygon.OffsetUnits * ctx->DrawBuffer->_MRD * 2;
key.offset_factor = ctx->Polygon.OffsetFactor * ctx->DrawBuffer->_MRD;
key.offset_clamp = ctx->Polygon.OffsetClamp * ctx->DrawBuffer->_MRD;
}
if (!ctx->Polygon._FrontBit) {

1
src/mesa/drivers/dri/i965/brw_clip.h
View File

@ -62,6 +62,7 @@ struct brw_clip_prog_key {
GLfloat offset_factor;
GLfloat offset_units;
GLfloat offset_clamp;
};

14
src/mesa/drivers/dri/i965/brw_clip_unfilled.c
View File

@ -188,6 +188,12 @@ static void copy_bfc( struct brw_clip_compile *c )
GLfloat bc = dir.y * iz;
offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
if (ctx->Polygon.OffsetClamp && isfinite(ctx->Polygon.OffsetClamp)) {
if (ctx->Polygon.OffsetClamp < 0)
offset = MAX2( offset, ctx->Polygon.OffsetClamp );
else
offset = MIN2( offset, ctx->Polygon.OffsetClamp );
}
offset *= MRD;
*/
static void compute_offset( struct brw_clip_compile *c )
@ -211,6 +217,14 @@ static void compute_offset( struct brw_clip_compile *c )
brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
if (c->key.offset_clamp && isfinite(c->key.offset_clamp)) {
brw_CMP(p,
vec1(brw_null_reg()),
c->key.offset_clamp < 0 ? BRW_CONDITIONAL_GE : BRW_CONDITIONAL_L,
vec1(off),
brw_imm_f(c->key.offset_clamp));
brw_SEL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_clamp));
}
}

2
src/mesa/drivers/dri/i965/brw_context.h
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@ -1457,6 +1457,8 @@ struct brw_context
*/
drm_intel_bo *multisampled_null_render_target_bo;
uint32_t fast_clear_op;
float offset_clamp;
} wm;
struct {

8
src/mesa/drivers/dri/i965/brw_misc_state.c
View File

@ -887,14 +887,6 @@ brw_upload_invariant_state(struct brw_context *brw)
brw_emit_select_pipeline(brw, BRW_RENDER_PIPELINE);
brw->last_pipeline = BRW_RENDER_PIPELINE;
if (brw->gen < 6) {
/* Disable depth offset clamping. */
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP << 16 | (2 - 2));
OUT_BATCH_F(0.0);
ADVANCE_BATCH();
}
if (brw->gen >= 8) {
BEGIN_BATCH(3);
OUT_BATCH(CMD_STATE_SIP << 16 | (3 - 2));

11
src/mesa/drivers/dri/i965/brw_wm_state.c
View File

@ -31,6 +31,7 @@
#include "intel_batchbuffer.h"
#include "intel_fbo.h"
#include "brw_context.h"
#include "brw_state.h"
@ -251,6 +252,16 @@ brw_upload_wm_unit(struct brw_context *brw)
}
brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
/* _NEW_POLGYON */
if (brw->wm.offset_clamp != ctx->Polygon.OffsetClamp) {
BEGIN_BATCH(2);
OUT_BATCH(_3DSTATE_GLOBAL_DEPTH_OFFSET_CLAMP << 16 | (2 - 2));
OUT_BATCH_F(ctx->Polygon.OffsetClamp);
ADVANCE_BATCH();
brw->wm.offset_clamp = ctx->Polygon.OffsetClamp;
}
}
const struct brw_tracked_state brw_wm_unit = {

2
src/mesa/drivers/dri/i965/intel_extensions.c
View File

@ -229,6 +229,7 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.EXT_packed_float = true;
ctx->Extensions.EXT_pixel_buffer_object = true;
ctx->Extensions.EXT_point_parameters = true;
ctx->Extensions.EXT_polygon_offset_clamp = true;
ctx->Extensions.EXT_provoking_vertex = true;
ctx->Extensions.EXT_stencil_two_side = true;
ctx->Extensions.EXT_texture_array = true;
@ -300,7 +301,6 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.AMD_vertex_shader_layer = true;
ctx->Extensions.EXT_framebuffer_multisample = true;
ctx->Extensions.EXT_framebuffer_multisample_blit_scaled = true;
ctx->Extensions.EXT_polygon_offset_clamp = true;
ctx->Extensions.EXT_transform_feedback = true;
ctx->Extensions.OES_depth_texture_cube_map = true;