iris: Report the same video memory settings as i965.
This just copy and pastes Ian's code from i965.
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@ -93,6 +93,14 @@ iris_get_name(struct pipe_screen *pscreen)
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return buf;
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}
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static uint64_t
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get_aperture_size(int fd)
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{
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struct drm_i915_gem_get_aperture aperture = {};
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drm_ioctl(fd, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
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return aperture.aper_size;
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}
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static int
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iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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{
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@ -250,8 +258,28 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
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return 0x8086;
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case PIPE_CAP_DEVICE_ID:
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return screen->pci_id;
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case PIPE_CAP_VIDEO_MEMORY:
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return INT_MAX; // XXX: bogus
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case PIPE_CAP_VIDEO_MEMORY: {
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/* Once a batch uses more than 75% of the maximum mappable size, we
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* assume that there's some fragmentation, and we start doing extra
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* flushing, etc. That's the big cliff apps will care about.
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*/
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const unsigned gpu_mappable_megabytes =
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(screen->aperture_bytes * 3 / 4) / (1024 * 1024);
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const long system_memory_pages = sysconf(_SC_PHYS_PAGES);
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const long system_page_size = sysconf(_SC_PAGE_SIZE);
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if (system_memory_pages <= 0 || system_page_size <= 0)
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return -1;
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const uint64_t system_memory_bytes =
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(uint64_t) system_memory_pages * (uint64_t) system_page_size;
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const unsigned system_memory_megabytes =
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(unsigned) (system_memory_bytes / (1024 * 1024));
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return MIN2(system_memory_megabytes, gpu_mappable_megabytes);
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}
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case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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case PIPE_CAP_MAX_VARYINGS:
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return 32;
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@ -575,6 +603,8 @@ iris_screen_create(int fd, const struct pipe_screen_config *config)
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screen->devinfo.timestamp_frequency =
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iris_getparam_integer(screen, I915_PARAM_CS_TIMESTAMP_FREQUENCY);
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screen->aperture_bytes = get_aperture_size(fd);
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if (getenv("INTEL_NO_HW") != NULL)
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screen->no_hw = true;
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@ -68,6 +68,8 @@ struct iris_screen {
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unsigned subslice_total;
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uint64_t aperture_bytes;
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struct gen_device_info devinfo;
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struct isl_device isl_dev;
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struct iris_bufmgr *bufmgr;
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