radeonsi: compute how many input VGPRs fragment shaders have
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
fe1b6ede01
commit
d995d4830e
|
@ -4537,6 +4537,47 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
|
|||
|
||||
radeon_llvm_dispose(&ctx.radeon_bld);
|
||||
|
||||
/* Calculate the number of fragment input VGPRs. */
|
||||
if (ctx.type == TGSI_PROCESSOR_FRAGMENT) {
|
||||
shader->num_input_vgprs = 0;
|
||||
shader->face_vgpr_index = -1;
|
||||
|
||||
if (G_0286CC_PERSP_SAMPLE_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_PERSP_PULL_MODEL_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 3;
|
||||
if (G_0286CC_LINEAR_SAMPLE_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_LINEAR_CENTROID_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 2;
|
||||
if (G_0286CC_LINE_STIPPLE_TEX_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_POS_X_FLOAT_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_POS_Y_FLOAT_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_POS_Z_FLOAT_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_POS_W_FLOAT_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_FRONT_FACE_ENA(shader->config.spi_ps_input_addr)) {
|
||||
shader->face_vgpr_index = shader->num_input_vgprs;
|
||||
shader->num_input_vgprs += 1;
|
||||
}
|
||||
if (G_0286CC_ANCILLARY_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_SAMPLE_COVERAGE_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
if (G_0286CC_POS_FIXED_PT_ENA(shader->config.spi_ps_input_addr))
|
||||
shader->num_input_vgprs += 1;
|
||||
}
|
||||
|
||||
if (ctx.type == TGSI_PROCESSOR_GEOMETRY) {
|
||||
shader->gs_copy_shader = CALLOC_STRUCT(si_shader);
|
||||
shader->gs_copy_shader->selector = shader->selector;
|
||||
|
|
|
@ -281,6 +281,8 @@ struct si_shader {
|
|||
|
||||
ubyte num_input_sgprs;
|
||||
ubyte num_input_vgprs;
|
||||
char face_vgpr_index;
|
||||
|
||||
unsigned vs_output_param_offset[PIPE_MAX_SHADER_OUTPUTS];
|
||||
bool uses_instanceid;
|
||||
unsigned nr_pos_exports;
|
||||
|
|
Loading…
Reference in New Issue