From d8ea64697bbdbc1c7987db00a55954e4cf094ad5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 5 Oct 2012 00:20:27 +0200 Subject: [PATCH] r600g: remove the "atom" variable from r600_command_buffer r600_command_buffer is not an atom. The "atoms" have evolved into state slots (or groups of state slots) where you can bind states. There is a fixed amount of atoms (state slots) in the context. The command buffers are nothing like that. They represent states, not state slots. We could probably give r600_atom a better name someday. Reviewed-by: Jerome Glisse --- src/gallium/drivers/r600/evergreen_compute.c | 4 +- src/gallium/drivers/r600/evergreen_state.c | 4 +- src/gallium/drivers/r600/r600_hw_context.c | 4 +- src/gallium/drivers/r600/r600_pipe.h | 44 ++++++++++++-------- src/gallium/drivers/r600/r600_state.c | 2 +- src/gallium/drivers/r600/r600_state_common.c | 13 +----- 6 files changed, 34 insertions(+), 37 deletions(-) diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c index 156e89ada49..402d4584d57 100644 --- a/src/gallium/drivers/r600/evergreen_compute.c +++ b/src/gallium/drivers/r600/evergreen_compute.c @@ -329,7 +329,7 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout, * See evergreen_init_atom_start_compute_cs() in this file for the list * of registers initialized by the start_compute_cs_cmd atom. */ - r600_emit_atom(ctx, &ctx->start_compute_cs_cmd.atom); + r600_emit_command_buffer(ctx->cs, &ctx->start_compute_cs_cmd); ctx->flags |= R600_CONTEXT_CB_FLUSH; r600_flush_emit(ctx); @@ -625,7 +625,7 @@ void evergreen_init_atom_start_compute_cs(struct r600_context *ctx) /* since all required registers are initialised in the * start_compute_cs_cmd atom, we can EMIT_EARLY here. */ - r600_init_command_buffer(ctx, cb, 1, 256); + r600_init_command_buffer(cb, 256); cb->pkt_flags = RADEON_CP_PACKET3_COMPUTE_MODE; switch (ctx->family) { diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index e35314f6c0e..a07302177b3 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -2373,7 +2373,7 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx) { struct r600_command_buffer *cb = &rctx->start_cs_cmd; - r600_init_command_buffer(rctx, cb, 0, 256); + r600_init_command_buffer(cb, 256); /* This must be first. */ r600_store_value(cb, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); @@ -2774,7 +2774,7 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx) return; } - r600_init_command_buffer(rctx, cb, 0, 256); + r600_init_command_buffer(cb, 256); /* This must be first. */ r600_store_value(cb, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 8245059b77a..723039a53cc 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -815,7 +815,7 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags) { struct radeon_winsys_cs *cs = ctx->cs; - if (cs->cdw == ctx->start_cs_cmd.atom.num_dw) + if (cs->cdw == ctx->start_cs_cmd.num_dw) return; ctx->timer_queries_suspended = false; @@ -875,7 +875,7 @@ void r600_begin_new_cs(struct r600_context *ctx) ctx->flags = 0; /* Begin a new CS. */ - r600_emit_atom(ctx, &ctx->start_cs_cmd.atom); + r600_emit_command_buffer(ctx->cs, &ctx->start_cs_cmd); /* Re-emit states. */ r600_atom_dirty(ctx, &ctx->alphatest_state.atom); diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 607116f7660..be7b891120e 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -59,8 +59,8 @@ struct r600_atom { /* This is an atom containing GPU commands that never change. * This is supposed to be copied directly into the CS. */ struct r600_command_buffer { - struct r600_atom atom; uint32_t *buf; + unsigned num_dw; unsigned max_num_dw; unsigned pkt_flags; }; @@ -504,6 +504,14 @@ struct r600_context { int last_start_instance; }; +static INLINE void r600_emit_command_buffer(struct radeon_winsys_cs *cs, + struct r600_command_buffer *cb) +{ + assert(cs->cdw + cb->num_dw <= RADEON_MAX_CMDBUF_DWORDS); + memcpy(cs->buf + cs->cdw, cb->buf, 4 * cb->num_dw); + cs->cdw += cb->num_dw; +} + static INLINE void r600_emit_atom(struct r600_context *rctx, struct r600_atom *atom) { atom->emit(rctx, atom); @@ -696,15 +704,15 @@ unsigned r600_tex_compare(unsigned compare); static INLINE void r600_store_value(struct r600_command_buffer *cb, unsigned value) { - cb->buf[cb->atom.num_dw++] = value; + cb->buf[cb->num_dw++] = value; } static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) { assert(reg < R600_CONTEXT_REG_OFFSET); - assert(cb->atom.num_dw+2+num <= cb->max_num_dw); - cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_CONFIG_REG, num, 0); - cb->buf[cb->atom.num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2; + assert(cb->num_dw+2+num <= cb->max_num_dw); + cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CONFIG_REG, num, 0); + cb->buf[cb->num_dw++] = (reg - R600_CONFIG_REG_OFFSET) >> 2; } /** @@ -714,9 +722,9 @@ static INLINE void r600_store_config_reg_seq(struct r600_command_buffer *cb, uns static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) { assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET); - assert(cb->atom.num_dw+2+num <= cb->max_num_dw); - cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_CONTEXT_REG, num, 0) | cb->pkt_flags; - cb->buf[cb->atom.num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2; + assert(cb->num_dw+2+num <= cb->max_num_dw); + cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CONTEXT_REG, num, 0) | cb->pkt_flags; + cb->buf[cb->num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2; } /** @@ -726,17 +734,17 @@ static INLINE void r600_store_context_reg_seq(struct r600_command_buffer *cb, un static INLINE void r600_store_ctl_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) { assert(reg >= R600_CTL_CONST_OFFSET); - assert(cb->atom.num_dw+2+num <= cb->max_num_dw); - cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_CTL_CONST, num, 0) | cb->pkt_flags; - cb->buf[cb->atom.num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2; + assert(cb->num_dw+2+num <= cb->max_num_dw); + cb->buf[cb->num_dw++] = PKT3(PKT3_SET_CTL_CONST, num, 0) | cb->pkt_flags; + cb->buf[cb->num_dw++] = (reg - R600_CTL_CONST_OFFSET) >> 2; } static INLINE void r600_store_loop_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) { assert(reg >= R600_LOOP_CONST_OFFSET); - assert(cb->atom.num_dw+2+num <= cb->max_num_dw); - cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0); - cb->buf[cb->atom.num_dw++] = (reg - R600_LOOP_CONST_OFFSET) >> 2; + assert(cb->num_dw+2+num <= cb->max_num_dw); + cb->buf[cb->num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0); + cb->buf[cb->num_dw++] = (reg - R600_LOOP_CONST_OFFSET) >> 2; } /** @@ -746,9 +754,9 @@ static INLINE void r600_store_loop_const_seq(struct r600_command_buffer *cb, uns static INLINE void eg_store_loop_const_seq(struct r600_command_buffer *cb, unsigned reg, unsigned num) { assert(reg >= EG_LOOP_CONST_OFFSET); - assert(cb->atom.num_dw+2+num <= cb->max_num_dw); - cb->buf[cb->atom.num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0) | cb->pkt_flags; - cb->buf[cb->atom.num_dw++] = (reg - EG_LOOP_CONST_OFFSET) >> 2; + assert(cb->num_dw+2+num <= cb->max_num_dw); + cb->buf[cb->num_dw++] = PKT3(PKT3_SET_LOOP_CONST, num, 0) | cb->pkt_flags; + cb->buf[cb->num_dw++] = (reg - EG_LOOP_CONST_OFFSET) >> 2; } static INLINE void r600_store_config_reg(struct r600_command_buffer *cb, unsigned reg, unsigned value) @@ -781,7 +789,7 @@ static INLINE void eg_store_loop_const(struct r600_command_buffer *cb, unsigned r600_store_value(cb, value); } -void r600_init_command_buffer(struct r600_context *rctx, struct r600_command_buffer *cb, unsigned id, unsigned num_dw); +void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw); void r600_release_command_buffer(struct r600_command_buffer *cb); /* diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index 1d6171debb5..1c24a0b7143 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -2223,7 +2223,7 @@ void r600_init_atom_start_cs(struct r600_context *rctx) struct r600_command_buffer *cb = &rctx->start_cs_cmd; uint32_t tmp; - r600_init_command_buffer(rctx, cb, 0, 256); + r600_init_command_buffer(cb, 256); /* R6xx requires this packet at the start of each command buffer */ if (rctx->chip_class == R600) { diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 2796b9d969d..481ab91c55d 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -34,19 +34,8 @@ #define R600_PRIM_RECTANGLE_LIST PIPE_PRIM_MAX -static void r600_emit_command_buffer(struct r600_context *rctx, struct r600_atom *atom) +void r600_init_command_buffer(struct r600_command_buffer *cb, unsigned num_dw) { - struct radeon_winsys_cs *cs = rctx->cs; - struct r600_command_buffer *cb = (struct r600_command_buffer*)atom; - - assert(cs->cdw + cb->atom.num_dw <= RADEON_MAX_CMDBUF_DWORDS); - memcpy(cs->buf + cs->cdw, cb->buf, 4 * cb->atom.num_dw); - cs->cdw += cb->atom.num_dw; -} - -void r600_init_command_buffer(struct r600_context *rctx, struct r600_command_buffer *cb, unsigned id, unsigned num_dw) -{ - r600_init_atom(rctx, &cb->atom, id, r600_emit_command_buffer, 0); cb->buf = CALLOC(1, 4 * num_dw); cb->max_num_dw = num_dw; }