nir: More NIR_MAX_VEC_COMPONENTS fixes

A couple of these probably aren't strictly necessary but they won't
hurt.  The one that's particularly tricky is a fixed-length array in
nir_search.h.  However, to avoid blowing up the binary size of
nir_opt_algebraic by about 2x, we just assert that only small ops are
used.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6655>

src/compiler/nir/nir_algebraic.py

@@ -392,6 +392,9 @@ class Expression(Value):
       self.sources = [ Value.create(src, "{0}_{1}".format(name_base, i), varset)
                        for (i, src) in enumerate(expr[1:]) ]
 
+      # nir_search_expression::srcs is hard-coded to 4
+      assert len(self.sources) <= 4
+
       if self.opcode in conv_opcode_types:
          assert self._bit_size is None, \
                 'Expression cannot use an unsized conversion opcode with ' \

src/compiler/nir/nir_instr_set.c

@@ -476,7 +476,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
       return true;
    }
 
-   uint8_t alu1_swizzle[4] = {0};
+   uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
    nir_src alu1_actual_src;
    nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
 
@@ -493,7 +493,7 @@ nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
          alu1_swizzle[i] = i;
    }
 
-   uint8_t alu2_swizzle[4] = {0};
+   uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
    nir_src alu2_actual_src;
    nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
 

src/compiler/nir/nir_lower_regs_to_ssa.c

@@ -131,7 +131,10 @@ rewrite_alu_instr(nir_alu_instr *alu, struct regs_to_ssa_state *state)
     * channels in the write mask.
     */
    unsigned num_components;
-   unsigned vec_swizzle[4] = { 0, 1, 2, 3 };
+   uint8_t vec_swizzle[NIR_MAX_VEC_COMPONENTS];
+   for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
+      vec_swizzle[i] = i;
+
    if (nir_op_infos[alu->op].output_size == 0) {
       /* Figure out the swizzle we need on the vecN operation and compute
        * the number of components in the SSA def at the same time.

src/compiler/nir/nir_lower_subgroups.c

@@ -120,7 +120,7 @@ lower_subgroup_op_to_scalar(nir_builder *b, nir_intrinsic_instr *intrin,
 
    nir_ssa_def *value = nir_ssa_for_src(b, intrin->src[0],
                                            intrin->num_components);
-   nir_ssa_def *reads[4];
+   nir_ssa_def *reads[NIR_MAX_VEC_COMPONENTS];
 
    for (unsigned i = 0; i < intrin->num_components; i++) {
       nir_intrinsic_instr *chan_intrin =

src/compiler/nir/nir_move_vec_src_uses_to_dest.c

@@ -110,7 +110,8 @@ move_vec_src_uses_to_dest_block(nir_block *block)
          continue;
 
       for (unsigned i; i = ffs(srcs_remaining) - 1, srcs_remaining;) {
-         int8_t swizzle[4] = { -1, -1, -1, -1 };
+         int8_t swizzle[NIR_MAX_VEC_COMPONENTS];
+         memset(swizzle, -1, sizeof(swizzle));
 
          for (unsigned j = i; j < nir_op_infos[vec->op].num_inputs; j++) {
             if (vec->src[j].src.ssa != vec->src[i].src.ssa)

src/compiler/nir/nir_opt_comparison_pre.c

@@ -237,7 +237,7 @@ comparison_pre_block(nir_block *block, struct block_queue *bq, nir_builder *bld)
       if (alu->dest.saturate)
          continue;
 
-      static const uint8_t swizzle[4] = { 0, 0, 0, 0 };
+      static const uint8_t swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
 
       switch (alu->op) {
       case nir_op_fadd: {

src/compiler/nir/nir_opt_idiv_const.c

@@ -110,7 +110,7 @@ nir_opt_idiv_const_instr(nir_builder *b, nir_alu_instr *alu)
 
    b->cursor = nir_before_instr(&alu->instr);
 
-   nir_ssa_def *q[4];
+   nir_ssa_def *q[NIR_MAX_VEC_COMPONENTS];
    for (unsigned comp = 0; comp < alu->dest.dest.ssa.num_components; comp++) {
       /* Get the numerator for the channel */
       nir_ssa_def *n = nir_channel(b, alu->src[0].src.ssa,

src/compiler/nir/nir_opt_if.c

@@ -1125,7 +1125,7 @@ propagate_condition_eval(nir_builder *b, nir_if *nif, nir_src *use_src,
    if (!evaluate_if_condition(nif, b->cursor, &bool_value))
       return false;
 
-   nir_ssa_def *def[4] = {0};
+   nir_ssa_def *def[NIR_MAX_VEC_COMPONENTS] = {0};
    for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
       if (alu->src[i].src.ssa == use_src->ssa) {
          def[i] = nir_imm_bool(b, bool_value);

src/compiler/nir/nir_opt_vectorize.c

@@ -200,7 +200,7 @@ instr_try_combine(struct nir_shader *nir, nir_instr *instr1, nir_instr *instr2,
          nir_const_value *c1 = nir_src_as_const_value(alu1->src[i].src);
          nir_const_value *c2 = nir_src_as_const_value(alu2->src[i].src);
          assert(c1 && c2);
-         nir_const_value value[4];
+         nir_const_value value[NIR_MAX_VEC_COMPONENTS];
          unsigned bit_size = alu1->src[i].src.ssa->bit_size;
 
          for (unsigned j = 0; j < total_components; j++) {
@@ -229,7 +229,9 @@ instr_try_combine(struct nir_shader *nir, nir_instr *instr1, nir_instr *instr2,
 
    nir_builder_instr_insert(&b, &new_alu->instr);
 
-   unsigned swiz[4] = {0, 1, 2, 3};
+   unsigned swiz[NIR_MAX_VEC_COMPONENTS];
+   for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
+      swiz[i] = i;
    nir_ssa_def *new_alu1 = nir_swizzle(&b, &new_alu->dest.dest.ssa, swiz,
                                        alu1_components);