i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles
When generating the MOV INDIRECT instruction, the source type is ignored and it is set to destination's type. However, this is going to change in a later patch, so we need to explicitly set the proper source type. brw_vec8_grf() creates an float type's fs_reg by default, when the ICP handle is actually unsigned. This patch fixes these cases before applying the aforementioned patch. Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Cc: "17.0" <mesa-stable@lists.freedesktop.org> Reviewed-by: Francisco Jerez <currojerez@riseup.net>
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@ -2030,7 +2030,7 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
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* we might read up to nir->info->gs.vertices_in registers.
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*/
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bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle,
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fs_reg(brw_vec8_grf(first_icp_handle, 0)),
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retype(brw_vec8_grf(first_icp_handle, 0), icp_handle.type),
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fs_reg(icp_offset_bytes),
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brw_imm_ud(nir->info->gs.vertices_in * REG_SIZE));
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}
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@ -2061,7 +2061,7 @@ fs_visitor::emit_gs_input_load(const fs_reg &dst,
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* we might read up to ceil(nir->info->gs.vertices_in / 8) registers.
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*/
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bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle,
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fs_reg(brw_vec8_grf(first_icp_handle, 0)),
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retype(brw_vec8_grf(first_icp_handle, 0), icp_handle.type),
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fs_reg(icp_offset_bytes),
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brw_imm_ud(DIV_ROUND_UP(nir->info->gs.vertices_in, 8) *
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REG_SIZE));
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@ -2401,7 +2401,7 @@ fs_visitor::nir_emit_tcs_intrinsic(const fs_builder &bld,
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/* Start at g1. We might read up to 4 registers. */
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bld.emit(SHADER_OPCODE_MOV_INDIRECT, icp_handle,
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fs_reg(brw_vec8_grf(1, 0)), vertex_offset_bytes,
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retype(brw_vec8_grf(1, 0), icp_handle.type), vertex_offset_bytes,
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brw_imm_ud(4 * REG_SIZE));
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}
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