intel/blorp: Fill out all the dwords of MI_ATOMIC
This makes us valgrind clean again.
Fixes: 9175c7058e
"intel/blorp: Make blorp update the clear color..."
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3366>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3366>
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@ -1792,7 +1792,9 @@ blorp_update_clear_color(struct blorp_batch *batch,
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.MemoryAddress = clear_addr);
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.MemoryAddress = clear_addr);
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/* dw starts at dword 1, but we need to fill dwords 3 and 5 */
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/* dw starts at dword 1, but we need to fill dwords 3 and 5 */
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dw[2] = info->clear_color.u32[0];
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dw[2] = info->clear_color.u32[0];
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dw[3] = 0;
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dw[4] = info->clear_color.u32[1];
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dw[4] = info->clear_color.u32[1];
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dw[5] = 0;
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clear_addr.offset += 8;
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clear_addr.offset += 8;
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dw = blorp_emitn(batch, GENX(MI_ATOMIC), num_dwords,
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dw = blorp_emitn(batch, GENX(MI_ATOMIC), num_dwords,
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@ -1804,7 +1806,9 @@ blorp_update_clear_color(struct blorp_batch *batch,
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.MemoryAddress = clear_addr);
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.MemoryAddress = clear_addr);
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/* dw starts at dword 1, but we need to fill dwords 3 and 5 */
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/* dw starts at dword 1, but we need to fill dwords 3 and 5 */
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dw[2] = info->clear_color.u32[2];
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dw[2] = info->clear_color.u32[2];
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dw[3] = 0;
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dw[4] = info->clear_color.u32[3];
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dw[4] = info->clear_color.u32[3];
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dw[5] = 0;
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blorp_emit(batch, GENX(PIPE_CONTROL), pipe) {
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blorp_emit(batch, GENX(PIPE_CONTROL), pipe) {
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pipe.StateCacheInvalidationEnable = true;
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pipe.StateCacheInvalidationEnable = true;
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