From d7a47a76e0c6ccd1765f4c10c390e7d4f5f86414 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Tue, 28 Jun 2016 14:48:22 -0700 Subject: [PATCH] i965: Update assertion to account for Gen < 7 Previously SHADER_OPCODE_MULH could only exist on Gen7+, so the assertion assumed the Gen7+ accumulator rules. A future patch will allow this instruction on at least Gen6, so update the assertion. v2: Use get_lowered_simd_width instead of open coding it. Suggested by Curro. Signed-off-by: Ian Romanick Reviewed-by: Matt Turner [v1] --- src/mesa/drivers/dri/i965/brw_fs.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp index 7316247dbd2..4f9a89e83e6 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp @@ -43,6 +43,9 @@ using namespace brw; +static unsigned get_lowered_simd_width(const struct brw_device_info *devinfo, + const fs_inst *inst); + void fs_inst::init(enum opcode opcode, uint8_t exec_size, const fs_reg &dst, const fs_reg *src, unsigned sources) @@ -3640,7 +3643,7 @@ fs_visitor::lower_integer_multiplication() } else if (inst->opcode == SHADER_OPCODE_MULH) { /* Should have been lowered to 8-wide. */ - assert(inst->exec_size <= 8); + assert(inst->exec_size <= get_lowered_simd_width(devinfo, inst)); const fs_reg acc = retype(brw_acc_reg(inst->exec_size), inst->dst.type); fs_inst *mul = ibld.MUL(acc, inst->src[0], inst->src[1]);