From d711e9813cf2990e881eb8f6497f9ed8c74abecb Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 13 May 2022 17:40:42 +0200 Subject: [PATCH] radv: determine if shaders use NGG before linking MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This would be needed by some NIR pass during linking. Given that NGG settings are currently dispatched in many places, I don't think this should hurt but it should be refactored at some point. Signed-off-by: Samuel Pitoiset Reviewed-by: Timur Kristóf Part-of: --- src/amd/vulkan/radv_pipeline.c | 55 ++++++++++++++++++++-------------- 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index e8db770eede..73b84153cbd 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3314,30 +3314,11 @@ radv_determine_ngg_settings(struct radv_pipeline *pipeline, } static void -radv_fill_shader_info(struct radv_pipeline *pipeline, - struct radv_pipeline_layout *pipeline_layout, - const struct radv_pipeline_key *pipeline_key, - struct radv_pipeline_stage *stages) +radv_fill_shader_info_ngg(struct radv_pipeline *pipeline, + const struct radv_pipeline_key *pipeline_key, + struct radv_pipeline_stage *stages) { struct radv_device *device = pipeline->device; - unsigned active_stages = 0; - unsigned filled_stages = 0; - - for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) { - if (stages[i].nir) - active_stages |= (1 << i); - } - - if (stages[MESA_SHADER_TESS_CTRL].nir) { - stages[MESA_SHADER_VERTEX].info.vs.as_ls = true; - } - - if (stages[MESA_SHADER_GEOMETRY].nir) { - if (stages[MESA_SHADER_TESS_CTRL].nir) - stages[MESA_SHADER_TESS_EVAL].info.tes.as_es = true; - else - stages[MESA_SHADER_VERTEX].info.vs.as_es = true; - } if (pipeline_key->use_ngg) { if (stages[MESA_SHADER_TESS_CTRL].nir) { @@ -3396,6 +3377,33 @@ radv_fill_shader_info(struct radv_pipeline *pipeline, } } } +} + +static void +radv_fill_shader_info(struct radv_pipeline *pipeline, + struct radv_pipeline_layout *pipeline_layout, + const struct radv_pipeline_key *pipeline_key, + struct radv_pipeline_stage *stages) +{ + struct radv_device *device = pipeline->device; + unsigned active_stages = 0; + unsigned filled_stages = 0; + + for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; i++) { + if (stages[i].nir) + active_stages |= (1 << i); + } + + if (stages[MESA_SHADER_TESS_CTRL].nir) { + stages[MESA_SHADER_VERTEX].info.vs.as_ls = true; + } + + if (stages[MESA_SHADER_GEOMETRY].nir) { + if (stages[MESA_SHADER_TESS_CTRL].nir) + stages[MESA_SHADER_TESS_EVAL].info.tes.as_es = true; + else + stages[MESA_SHADER_VERTEX].info.vs.as_es = true; + } if (stages[MESA_SHADER_FRAGMENT].nir) { radv_nir_shader_info_init(&stages[MESA_SHADER_FRAGMENT].info); @@ -4536,6 +4544,9 @@ radv_create_shaders(struct radv_pipeline *pipeline, struct radv_pipeline_layout bool optimize_conservatively = pipeline_key->optimisations_disabled; + /* Determine if shaders uses NGG before linking because it's needed for some NIR pass. */ + radv_fill_shader_info_ngg(pipeline, pipeline_key, stages); + radv_link_shaders(pipeline, pipeline_key, stages, optimize_conservatively); radv_set_driver_locations(pipeline, stages);