nv50/ir: restructure and rename postraconstantfolding pass
we might want to add more folding passes here, so make it a bit more generic v2: leave the comment and reword commit message v4: rename it to PostRaLoadPropagation Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
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@ -3190,10 +3190,12 @@ FlatteningPass::tryPredicateConditional(BasicBlock *bb)
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// constraint SDST == SSRC2
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// TODO:
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// Does NVC0+ have other situations where this pass makes sense?
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class NV50PostRaConstantFolding : public Pass
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class PostRaLoadPropagation : public Pass
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{
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private:
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virtual bool visit(BasicBlock *);
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virtual bool visit(Instruction *);
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void handleMAD(Instruction *);
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};
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static bool
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@ -3205,68 +3207,71 @@ post_ra_dead(Instruction *i)
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return true;
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}
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bool
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NV50PostRaConstantFolding::visit(BasicBlock *bb)
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// Fold Immediate into MAD; must be done after register allocation due to
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// constraint SDST == SSRC2
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void
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PostRaLoadPropagation::handleMAD(Instruction *i)
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{
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if (i->def(0).getFile() != FILE_GPR ||
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i->src(0).getFile() != FILE_GPR ||
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i->src(1).getFile() != FILE_GPR ||
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i->src(2).getFile() != FILE_GPR ||
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i->getDef(0)->reg.data.id != i->getSrc(2)->reg.data.id)
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return;
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if (i->getDef(0)->reg.data.id >= 64 ||
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i->getSrc(0)->reg.data.id >= 64)
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return;
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if (i->flagsSrc >= 0 && i->getSrc(i->flagsSrc)->reg.data.id != 0)
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return;
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if (i->getPredicate())
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return;
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Value *vtmp;
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Instruction *def;
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Instruction *def = i->getSrc(1)->getInsn();
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for (Instruction *i = bb->getFirst(); i; i = i->next) {
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switch (i->op) {
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case OP_MAD:
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if (i->def(0).getFile() != FILE_GPR ||
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i->src(0).getFile() != FILE_GPR ||
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i->src(1).getFile() != FILE_GPR ||
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i->src(2).getFile() != FILE_GPR ||
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i->getDef(0)->reg.data.id != i->getSrc(2)->reg.data.id)
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break;
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if (i->getDef(0)->reg.data.id >= 64 ||
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i->getSrc(0)->reg.data.id >= 64)
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break;
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if (i->flagsSrc >= 0 && i->getSrc(i->flagsSrc)->reg.data.id != 0)
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break;
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if (i->getPredicate())
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break;
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def = i->getSrc(1)->getInsn();
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if (def && def->op == OP_SPLIT && typeSizeof(def->sType) == 4)
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def = def->getSrc(0)->getInsn();
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if (def && def->op == OP_MOV && def->src(0).getFile() == FILE_IMMEDIATE) {
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vtmp = i->getSrc(1);
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if (isFloatType(i->sType)) {
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i->setSrc(1, def->getSrc(0));
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} else {
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ImmediateValue val;
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bool ret = def->src(0).getImmediate(val);
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assert(ret);
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if (i->getSrc(1)->reg.data.id & 1)
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val.reg.data.u32 >>= 16;
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val.reg.data.u32 &= 0xffff;
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i->setSrc(1, new_ImmediateValue(bb->getProgram(), val.reg.data.u32));
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}
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/* There's no post-RA dead code elimination, so do it here
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* XXX: if we add more code-removing post-RA passes, we might
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* want to create a post-RA dead-code elim pass */
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if (post_ra_dead(vtmp->getInsn())) {
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Value *src = vtmp->getInsn()->getSrc(0);
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// Careful -- splits will have already been removed from the
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// functions. Don't double-delete.
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if (vtmp->getInsn()->bb)
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delete_Instruction(prog, vtmp->getInsn());
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if (src->getInsn() && post_ra_dead(src->getInsn()))
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delete_Instruction(prog, src->getInsn());
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}
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break;
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}
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break;
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default:
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break;
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if (def && def->op == OP_SPLIT && typeSizeof(def->sType) == 4)
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def = def->getSrc(0)->getInsn();
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if (def && def->op == OP_MOV && def->src(0).getFile() == FILE_IMMEDIATE) {
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vtmp = i->getSrc(1);
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if (isFloatType(i->sType)) {
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i->setSrc(1, def->getSrc(0));
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} else {
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ImmediateValue val;
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bool ret = def->src(0).getImmediate(val);
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assert(ret);
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if (i->getSrc(1)->reg.data.id & 1)
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val.reg.data.u32 >>= 16;
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val.reg.data.u32 &= 0xffff;
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i->setSrc(1, new_ImmediateValue(prog, val.reg.data.u32));
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}
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/* There's no post-RA dead code elimination, so do it here
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* XXX: if we add more code-removing post-RA passes, we might
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* want to create a post-RA dead-code elim pass */
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if (post_ra_dead(vtmp->getInsn())) {
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Value *src = vtmp->getInsn()->getSrc(0);
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// Careful -- splits will have already been removed from the
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// functions. Don't double-delete.
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if (vtmp->getInsn()->bb)
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delete_Instruction(prog, vtmp->getInsn());
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if (src->getInsn() && post_ra_dead(src->getInsn()))
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delete_Instruction(prog, src->getInsn());
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}
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}
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}
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bool
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PostRaLoadPropagation::visit(Instruction *i)
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{
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switch (i->op) {
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case OP_MAD:
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handleMAD(i);
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break;
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default:
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break;
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}
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return true;
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@ -3694,7 +3699,7 @@ Program::optimizePostRA(int level)
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{
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RUN_PASS(2, FlatteningPass, run);
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if (getTarget()->getChipset() < 0xc0)
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RUN_PASS(2, NV50PostRaConstantFolding, run);
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RUN_PASS(2, PostRaLoadPropagation, run);
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return true;
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}
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