From d6a07732c9c155c73f7d2cddc10faa7eab768df9 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 25 Mar 2019 13:37:46 +0100 Subject: [PATCH] ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3 Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/common/ac_llvm_build.c | 27 +++++++++++++++++++++++++++ src/amd/common/ac_llvm_build.h | 4 ++++ src/amd/common/ac_nir_to_llvm.c | 13 +++++-------- 3 files changed, 36 insertions(+), 8 deletions(-) diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 1123dce2cc8..04d4b377fd1 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -2430,6 +2430,33 @@ void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16) ctx->voidt, args, 1, 0); } +LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0, + LLVMValueRef src1, LLVMValueRef src2, + unsigned bitsize) +{ + LLVMTypeRef type; + char *intr; + + if (bitsize == 16) { + intr = "llvm.amdgcn.fmed3.f16"; + type = ctx->f16; + } else if (bitsize == 32) { + intr = "llvm.amdgcn.fmed3.f32"; + type = ctx->f32; + } else { + intr = "llvm.amdgcn.fmed3.f64"; + type = ctx->f64; + } + + LLVMValueRef params[] = { + src0, + src1, + src2, + }; + return ac_build_intrinsic(ctx, intr, type, params, 3, + AC_FUNC_ATTR_READNONE); +} + LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize) { diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h index 9151c743bed..14c1c56522b 100644 --- a/src/amd/common/ac_llvm_build.h +++ b/src/amd/common/ac_llvm_build.h @@ -549,6 +549,10 @@ void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16); LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize); +LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0, + LLVMValueRef src1, LLVMValueRef src2, + unsigned bitsize); + LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0, unsigned bitsize); diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index b25cc6a0a84..f16be5c0f2a 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -1111,14 +1111,11 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr) result = emit_minmax_int(&ctx->ac, LLVMIntSGT, result, src[2]); break; case nir_op_fmed3: { - LLVMValueRef tmp1 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum", - ac_to_float_type(&ctx->ac, def_type), src[0], src[1]); - LLVMValueRef tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum", - ac_to_float_type(&ctx->ac, def_type), src[0], src[1]); - tmp2 = emit_intrin_2f_param(&ctx->ac, "llvm.minnum", - ac_to_float_type(&ctx->ac, def_type), tmp2, src[2]); - result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum", - ac_to_float_type(&ctx->ac, def_type), tmp1, tmp2); + src[0] = ac_to_float(&ctx->ac, src[0]); + src[1] = ac_to_float(&ctx->ac, src[1]); + src[2] = ac_to_float(&ctx->ac, src[2]); + result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2], + instr->dest.dest.ssa.bit_size); break; } case nir_op_imed3: {