radeonsi: Read config values from the .AMDGPU.config ELF section
Instead of emitting configuration values (e.g. number of gprs used) in a predefined order, the LLVM backend now emits these values in register/value pairs. The first dword contains the register address and the second dword contians the value to write. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
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@179544
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@179546
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@ -1110,25 +1110,45 @@ int si_compile_llvm(struct r600_context *rctx, struct si_pipe_shader *shader,
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}
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}
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}
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}
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shader->num_sgprs = util_le32_to_cpu(*(uint32_t*)binary.code);
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/* XXX: We may be able to emit some of these values directly rather than
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shader->num_vgprs = util_le32_to_cpu(*(uint32_t*)(binary.code + 4));
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* extracting fields to be emitted later.
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shader->spi_ps_input_ena = util_le32_to_cpu(*(uint32_t*)(binary.code + 8));
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*/
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for (i = 0; i < binary.config_size; i+= 8) {
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unsigned reg = util_le32_to_cpu(*(uint32_t*)(binary.config + i));
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unsigned value = util_le32_to_cpu(*(uint32_t*)(binary.config + i + 4));
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switch (reg) {
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case R_00B028_SPI_SHADER_PGM_RSRC1_PS:
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case R_00B128_SPI_SHADER_PGM_RSRC1_VS:
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case R_00B228_SPI_SHADER_PGM_RSRC1_GS:
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case R_00B848_COMPUTE_PGM_RSRC1:
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shader->num_sgprs = (G_00B028_SGPRS(value) + 1) * 8;
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shader->num_vgprs = (G_00B028_VGPRS(value) + 1) * 4;
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break;
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case R_0286CC_SPI_PS_INPUT_ENA:
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shader->spi_ps_input_ena = value;
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break;
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default:
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fprintf(stderr, "Warning: Compiler emitted unknown "
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"config register: 0x%x\n", reg);
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break;
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}
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}
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/* copy new shader */
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/* copy new shader */
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si_resource_reference(&shader->bo, NULL);
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si_resource_reference(&shader->bo, NULL);
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shader->bo = si_resource_create_custom(rctx->context.screen, PIPE_USAGE_IMMUTABLE,
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shader->bo = si_resource_create_custom(rctx->context.screen, PIPE_USAGE_IMMUTABLE,
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binary.code_size - 12);
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binary.code_size);
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if (shader->bo == NULL) {
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if (shader->bo == NULL) {
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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ptr = (uint32_t*)rctx->ws->buffer_map(shader->bo->cs_buf, rctx->cs, PIPE_TRANSFER_WRITE);
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ptr = (uint32_t*)rctx->ws->buffer_map(shader->bo->cs_buf, rctx->cs, PIPE_TRANSFER_WRITE);
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if (0 /*R600_BIG_ENDIAN*/) {
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if (0 /*R600_BIG_ENDIAN*/) {
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for (i = 0; i < (binary.code_size - 12) / 4; ++i) {
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for (i = 0; i < binary.code_size / 4; ++i) {
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ptr[i] = util_bswap32(*(uint32_t*)(binary.code+12 + i*4));
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ptr[i] = util_bswap32(*(uint32_t*)(binary.code + i*4));
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}
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}
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} else {
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} else {
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memcpy(ptr, binary.code + 12, binary.code_size - 12);
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memcpy(ptr, binary.code, binary.code_size);
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}
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}
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rctx->ws->buffer_unmap(shader->bo->cs_buf);
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rctx->ws->buffer_unmap(shader->bo->cs_buf);
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