radeon/llvm: Assert if we try to copy SCC reg
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@ -38,6 +38,12 @@ SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
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unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const
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{
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// If we are trying to copy to or from SCC, there is a bug somewhere else in
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// the backend. While it may be theoretically possible to do this, it should
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// never be necessary.
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assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
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BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg)
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.addReg(SrcReg, getKillRegState(KillSrc));
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}
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