iris: initial render state upload

src/gallium/drivers/iris/iris_batch.c

@@ -716,3 +716,14 @@ iris_alloc_state(struct iris_batch *batch,
    *out_offset = offset;
    return batch->statebuf.map_next;
 }
+
+uint32_t
+iris_emit_state(struct iris_batch *batch,
+                const void *data,
+                int size, int alignment)
+{
+   uint32_t out_offset;
+   void *dest = iris_alloc_state(batch, size, alignment, &out_offset);
+   memcpy(dest, data, size);
+   return out_offset;
+}

src/gallium/drivers/iris/iris_batch.h

@@ -88,6 +88,8 @@ void iris_batch_free(struct iris_batch *batch);
 void iris_require_command_space(struct iris_batch *batch, unsigned size);
 void iris_require_state_space(struct iris_batch *batch, unsigned size);
 void iris_batch_emit(struct iris_batch *batch, const void *data, unsigned size);
+uint32_t iris_emit_state(struct iris_batch *batch, const void *data, int size,
+                         int alignment);
 void *iris_alloc_state(struct iris_batch *batch, int size, int alignment,
                        uint32_t *out_offset);
 

src/gallium/drivers/iris/iris_context.h

@@ -30,6 +30,7 @@
 #include "iris_screen.h"
 
 struct iris_bo;
+struct iris_batch;
 
 #define IRIS_MAX_TEXTURE_SAMPLERS 32
 #define IRIS_MAX_VIEWPORTS 16
@@ -39,8 +40,14 @@ enum iris_dirty {
    IRIS_DIRTY_POLYGON_STIPPLE,
    IRIS_DIRTY_SCISSOR_RECT,
    IRIS_DIRTY_WM_DEPTH_STENCIL,
+   IRIS_DIRTY_CC_VIEWPORT,
+   IRIS_DIRTY_SF_CL_VIEWPORT,
+   IRIS_DIRTY_PS_BLEND,
+   IRIS_DIRTY_BLEND_STATE,
 };
 
+struct iris_depth_stencil_alpha_state;
+
 #define IRIS_NEW_COLOR_CALC_STATE (1ull << IRIS_DIRTY_COLOR_CALC_STATE)
 #define IRIS_NEW_POLYGON_STIPPLE  (1ull << IRIS_DIRTY_POLYGON_STIPPLE)
 #define IRIS_NEW_SCISSOR_RECT     (1ull << IRIS_DIRTY_SCISSOR_RECT)
@@ -53,6 +60,8 @@ struct iris_context {
 
    struct {
       uint64_t dirty;
+      struct iris_blend_state *cso_blend;
+      struct iris_depth_stencil_alpha_state *cso_zsa;
       struct pipe_blend_color blend_color;
       struct pipe_poly_stipple poly_stipple;
       struct pipe_scissor_state scissors[IRIS_MAX_VIEWPORTS];
@@ -75,4 +84,6 @@ iris_create_context(struct pipe_screen *screen, void *priv, unsigned flags);
 void iris_init_program_functions(struct pipe_context *ctx);
 void iris_init_state_functions(struct pipe_context *ctx);
 
+void iris_upload_render_state(struct iris_context *ice, struct iris_batch *batch);
+
 #endif

src/gallium/drivers/iris/iris_draw.c

@@ -64,6 +64,10 @@ __gen_combine_address(void *user_data, void *location,
 static void
 iris_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
 {
+   struct iris_context *ice = (struct iris_context *) ctx;
+
+   iris_upload_render_state(ice);
+
 #if 0
    l3 configuration
 

src/gallium/drivers/iris/iris_state.c

@@ -29,6 +29,7 @@
 #include "util/u_inlines.h"
 #include "util/u_transfer.h"
 #include "intel/compiler/brw_compiler.h"
+#include "iris_batch.h"
 #include "iris_context.h"
 #include "iris_resource.h"
 
@@ -59,6 +60,10 @@ __gen_combine_address(void *user_data, void *location,
         __genxml_cmd_pack(cmd)(NULL, (void *)_dst, &name),        \
         _dst = NULL)
 
+#define iris_emit_cmd(batch, cmd, name) \
+   iris_require_command_space(batch, 4 * __genxml_cmd_length(cmd)); \
+   iris_pack_command(cmd, batch->cmdbuf.map_next, name)
+
 #include "genxml/genX_pack.h"
 #include "genxml/gen_macros.h"
 
@@ -280,6 +285,15 @@ iris_create_blend_state(struct pipe_context *ctx,
    return cso;
 }
 
+static void
+iris_bind_blend_state(struct pipe_context *ctx, void *state)
+{
+   struct iris_context *ice = (struct iris_context *) ctx;
+   ice->state.cso_blend = state;
+   ice->state.dirty |= IRIS_DIRTY_CC_VIEWPORT;
+   ice->state.dirty |= IRIS_DIRTY_WM_DEPTH_STENCIL;
+}
+
 struct iris_depth_stencil_alpha_state {
    uint32_t wmds[GENX(3DSTATE_WM_DEPTH_STENCIL_length)];
    uint32_t cc_vp[GENX(CC_VIEWPORT_length)];
@@ -288,7 +302,7 @@ struct iris_depth_stencil_alpha_state {
 };
 
 static void *
-iris_create_dsa_state(struct pipe_context *ctx,
+iris_create_zsa_state(struct pipe_context *ctx,
                       const struct pipe_depth_stencil_alpha_state *state)
 {
    struct iris_depth_stencil_alpha_state *cso =
@@ -336,6 +350,15 @@ iris_create_dsa_state(struct pipe_context *ctx,
    return cso;
 }
 
+static void
+iris_bind_zsa_state(struct pipe_context *ctx, void *state)
+{
+   struct iris_context *ice = (struct iris_context *) ctx;
+   ice->state.cso_zsa = state;
+   ice->state.dirty |= IRIS_DIRTY_CC_VIEWPORT;
+   ice->state.dirty |= IRIS_DIRTY_WM_DEPTH_STENCIL;
+}
+
 struct iris_rasterizer_state {
    uint32_t sf[GENX(3DSTATE_SF_length)];
    uint32_t clip[GENX(3DSTATE_CLIP_length)];
@@ -842,11 +865,6 @@ iris_surface_destroy(struct pipe_context *ctx, struct pipe_surface *surface)
    free(surface);
 }
 
-static void
-iris_bind_state(struct pipe_context *ctx, void *state)
-{
-}
-
 static void
 iris_delete_state(struct pipe_context *ctx, void *state)
 {
@@ -986,19 +1004,168 @@ iris_set_stream_output_targets(struct pipe_context *ctx,
 {
 }
 
+void
+iris_upload_render_state(struct iris_context *ice, struct iris_batch *batch)
+{
+   const uint64_t dirty = ice->state.dirty;
+
+   if (dirty & IRIS_DIRTY_WM_DEPTH_STENCIL) {
+      // XXX: import stencil ref...
+      struct iris_depth_stencil_alpha_state *cso = ice->state.cso_zsa;
+      iris_batch_emit(batch, cso->wmds, sizeof(cso->wmds));
+   }
+
+   if (dirty & IRIS_DIRTY_CC_VIEWPORT) {
+      struct iris_depth_stencil_alpha_state *cso = ice->state.cso_zsa;
+      iris_emit_cmd(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), ptr) {
+         ptr.CCViewportPointer =
+            iris_emit_state(batch, cso->cc_vp, sizeof(cso->cc_vp), 32);
+      }
+   }
+
+   if (dirty & IRIS_DIRTY_PS_BLEND) {
+      struct iris_blend_state *cso = ice->state.cso_blend;
+      iris_batch_emit(batch, cso->ps_blend, sizeof(cso->ps_blend));
+   }
+
+   if (dirty & IRIS_DIRTY_BLEND_STATE) {
+      struct iris_blend_state *cso = ice->state.cso_blend;
+      // XXX: 3DSTATE_BLEND_STATE_POINTERS - BLEND_STATE
+      // -> from iris_blend_state (most) + iris_depth_stencil_alpha_state
+      //    (alpha test function/enable) + has writeable RT from ???????
+   }
+
+   if (dirty & IRIS_DIRTY_SF_CL_VIEWPORT) {
+      struct iris_depth_stencil_alpha_state *cso = ice->state.cso_zsa;
+      iris_emit_cmd(batch, GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC), ptr) {
+         ptr.CCViewportPointer =
+            iris_emit_state(batch, cso->cc_vp, sizeof(cso->cc_vp), 32);
+      }
+   }
+
+#if 0
+   l3 configuration
+
+   3DSTATE_VIEWPORT_STATE_POINTERS_SF_CL - SF_CLIP_VIEWPORT
+     -> pipe_viewport_state for matrix elements, guardband is calculated
+        from those.  can calculate screen space from matrix apparently...
+
+   3DSTATE_SCISSOR_STATE_POINTERS - SCISSOR_RECT
+     -> from ice->state.scissors
+
+   3DSTATE_PUSH_CONSTANT_ALLOC_*
+   3DSTATE_URB_*
+     -> TODO
+
+   3DSTATE_CC_STATE_POINTERS - COLOR_CALC_STATE
+     -> from ice->state.blend_color + iris_depth_stencil_alpha_state
+        (ref_value)
+
+   3DSTATE_CONSTANT_* - push constants
+     -> TODO
+
+   Surfaces:
+   - pull constants
+   - ubos/ssbos/abos
+   - images
+   - textures
+   - render targets - write and read
+   3DSTATE_BINDING_TABLE_POINTERS_*
+     -> TODO
+
+   3DSTATE_SAMPLER_STATE_POINTERS_*
+     -> TODO
+
+   3DSTATE_MULTISAMPLE
+   3DSTATE_SAMPLE_MASK
+
+   3DSTATE_VS
+   3DSTATE_HS
+   3DSTATE_TE
+   3DSTATE_DS
+   3DSTATE_GS
+   3DSTATE_PS_EXTRA
+   3DSTATE_PS
+   3DSTATE_STREAMOUT
+   3DSTATE_SO_BUFFER
+   3DSTATE_SO_DECL_LIST
+
+   3DSTATE_CLIP
+     -> iris_raster_state + ??? (Non-perspective Bary, ForceZeroRTAIndex)
+
+   3DSTATE_RASTER
+   3DSTATE_SF
+     -> iris_raster_state
+
+   3DSTATE_WM
+     -> iris_raster_state + FS state (barycentric, EDSC)
+   3DSTATE_SBE
+     -> iris_raster_state (point sprite texture coordinate origin)
+     -> bunch of shader state...
+   3DSTATE_SBE_SWIZ
+     -> FS state
+
+   3DSTATE_DEPTH_BUFFER
+   3DSTATE_HIER_DEPTH_BUFFER
+   3DSTATE_STENCIL_BUFFER
+   3DSTATE_CLEAR_PARAMS
+     -> iris_framebuffer_state?
+
+   3DSTATE_VF_TOPOLOGY
+     -> pipe_draw_info (prim_mode)
+   3DSTATE_VF
+     -> pipe_draw_info (restart_index, primitive_restart)
+
+   3DSTATE_INDEX_BUFFER
+     -> pipe_draw_info (index)
+   3DSTATE_VERTEX_BUFFERS
+     -> pipe_vertex_buffer (set_vertex_buffer hook)
+   3DSTATE_VERTEX_ELEMENTS
+     -> iris_vertex_element
+   3DSTATE_VF_INSTANCING
+     -> iris_vertex_element
+   3DSTATE_VF_SGVS
+     -> TODO ???
+   3DSTATE_VF_COMPONENT_PACKING
+     -> TODO ???
+
+   3DPRIMITIVE
+     -> pipe_draw_info
+
+   rare:
+   3DSTATE_POLY_STIPPLE_OFFSET
+   3DSTATE_POLY_STIPPLE_PATTERN
+     -> ice->state.poly_stipple
+   3DSTATE_LINE_STIPPLE
+     -> iris_raster_state
+
+   once:
+   3DSTATE_AA_LINE_PARAMETERS
+   3DSTATE_WM_CHROMAKEY
+   3DSTATE_SAMPLE_PATTERN
+   3DSTATE_DRAWING_RECTANGLE
+   3DSTATE_WM_HZ_OP
+#endif
+}
+
+static void
+iris_bind_state(struct pipe_context *ctx, void *state)
+{
+}
+
 void
 iris_init_state_functions(struct pipe_context *ctx)
 {
    ctx->create_blend_state = iris_create_blend_state;
-   ctx->create_depth_stencil_alpha_state = iris_create_dsa_state;
+   ctx->create_depth_stencil_alpha_state = iris_create_zsa_state;
    ctx->create_rasterizer_state = iris_create_rasterizer_state;
    ctx->create_sampler_state = iris_create_sampler_state;
    ctx->create_sampler_view = iris_create_sampler_view;
    ctx->create_surface = iris_create_surface;
    ctx->create_vertex_elements_state = iris_create_vertex_elements;
    ctx->create_compute_state = iris_create_compute_state;
-   ctx->bind_blend_state = iris_bind_state;
-   ctx->bind_depth_stencil_alpha_state = iris_bind_state;
+   ctx->bind_blend_state = iris_bind_blend_state;
+   ctx->bind_depth_stencil_alpha_state = iris_bind_zsa_state;
    ctx->bind_sampler_states = iris_bind_sampler_states;
    ctx->bind_fs_state = iris_bind_state;
    ctx->bind_rasterizer_state = iris_bind_state;