intel/blorp: Emit 3DSTATE_STENCIL_BUFFER before HIER_DEPTH
We're about to replace blorp's emit code with ISL and it emits them in the other order. This makes diffing the aubs easier. Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
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@ -854,18 +854,6 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
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}
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}
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blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) {
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if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) {
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hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1;
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hiz.SurfaceBaseAddress = params->depth.aux_addr;
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hiz.HierarchicalDepthBufferMOCS = mocs;
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#if GEN_GEN >= 8
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hiz.SurfaceQPitch =
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isl_surf_get_array_pitch_sa_rows(¶ms->depth.aux_surf) >> 2;
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#endif
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}
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}
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blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
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if (params->stencil.enabled) {
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#if GEN_GEN >= 8 || GEN_IS_HASWELL
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@ -883,6 +871,18 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
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}
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}
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blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) {
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if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) {
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hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1;
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hiz.SurfaceBaseAddress = params->depth.aux_addr;
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hiz.HierarchicalDepthBufferMOCS = mocs;
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#if GEN_GEN >= 8
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hiz.SurfaceQPitch =
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isl_surf_get_array_pitch_sa_rows(¶ms->depth.aux_surf) >> 2;
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#endif
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}
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}
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/* 3DSTATE_CLEAR_PARAMS
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*
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* From the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE_CLEAR_PARAMS:
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