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intel/blorp: Emit 3DSTATE_STENCIL_BUFFER before HIER_DEPTH 

We're about to replace blorp's emit code with ISL and it emits them in
the other order.  This makes diffing the aubs easier.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand 2017-04-05 16:59:06 -07:00
parent f93dc5beee
commit d3785dcb2f
1 changed files with 12 additions and 12 deletions
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24
src/intel/blorp/blorp_genX_exec.h
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@ -854,18 +854,6 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
}
}
blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) {
if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) {
hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1;
hiz.SurfaceBaseAddress = params->depth.aux_addr;
hiz.HierarchicalDepthBufferMOCS = mocs;
#if GEN_GEN >= 8
hiz.SurfaceQPitch =
isl_surf_get_array_pitch_sa_rows(&params->depth.aux_surf) >> 2;
#endif
}
}
blorp_emit(batch, GENX(3DSTATE_STENCIL_BUFFER), sb) {
if (params->stencil.enabled) {
#if GEN_GEN >= 8 || GEN_IS_HASWELL
@ -883,6 +871,18 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch,
}
}
blorp_emit(batch, GENX(3DSTATE_HIER_DEPTH_BUFFER), hiz) {
if (params->depth.aux_usage == ISL_AUX_USAGE_HIZ) {
hiz.SurfacePitch = params->depth.aux_surf.row_pitch - 1;
hiz.SurfaceBaseAddress = params->depth.aux_addr;
hiz.HierarchicalDepthBufferMOCS = mocs;
#if GEN_GEN >= 8
hiz.SurfaceQPitch =
isl_surf_get_array_pitch_sa_rows(&params->depth.aux_surf) >> 2;
#endif
}
}
/* 3DSTATE_CLEAR_PARAMS
*
* From the Sandybridge PRM, Volume 2, Part 1, Section 3DSTATE_CLEAR_PARAMS: