r600g: use depth decompression in new path
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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4ca1a92b7f
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@ -84,9 +84,13 @@ struct r600_vertex_element
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struct r600_pipe_context {
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struct pipe_context context;
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struct blitter_context *blitter;
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struct pipe_framebuffer_state *pframebuffer;
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unsigned family;
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void *custom_dsa_flush;
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struct list_head query_list; /* fake member for depth remove once merged */
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struct r600_screen *screen;
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struct radeon *radeon;
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struct blitter_context *blitter;
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struct r600_pipe_state *states[R600_PIPE_NSTATES];
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struct r600_context ctx;
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struct r600_vertex_element *vertex_elements;
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@ -116,7 +120,6 @@ struct r600_pipe_context {
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bool flatshade;
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struct u_upload_mgr *upload_vb;
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struct u_upload_mgr *upload_ib;
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enum radeon_family family;
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unsigned any_user_vbs;
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};
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@ -677,7 +677,7 @@ static void r600_flush2(struct pipe_context *ctx, unsigned flags,
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#if 0
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sprintf(dname, "gallium-%08d.bof", dc);
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if (dc < 20) {
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if (dc < 4) {
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r600_context_dump_bof(&rctx->ctx, dname);
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R600_ERR("dumped %s\n", dname);
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}
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@ -1191,14 +1191,11 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
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bo[1] = rbuffer->bo;
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/* FIXME depth texture decompression */
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if (tmp->depth) {
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#if 0
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r = r600_texture_from_depth(ctx, tmp, view->first_level);
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if (r) {
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return;
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}
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bo[0] = radeon_ws_bo_incref(rscreen->rw, tmp->uncompressed);
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bo[1] = radeon_ws_bo_incref(rscreen->rw, tmp->uncompressed);
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#endif
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r600_texture_depth_flush(ctx, texture);
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tmp = (struct r600_resource_texture*)texture;
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rbuffer = &tmp->flushed_depth_texture->resource;
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bo[0] = rbuffer->bo;
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bo[1] = rbuffer->bo;
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}
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pitch = align(tmp->pitch[0] / tmp->bpt, 8);
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@ -1598,6 +1595,7 @@ static void r600_set_framebuffer_state(struct pipe_context *ctx,
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}
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pipe_surface_reference(&rctx->framebuffer.zsbuf, state->zsbuf);
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rctx->framebuffer = *state;
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rctx->pframebuffer = &rctx->framebuffer;
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/* build states */
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for (int i = 0; i < state->nr_cbufs; i++) {
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@ -2133,6 +2131,44 @@ static void r600_init_query_functions2(struct r600_pipe_context *rctx)
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rctx->context.get_query_result = r600_get_query_result;
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}
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static void *r600_create_db_flush_dsa(struct r600_pipe_context *rctx)
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{
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struct pipe_depth_stencil_alpha_state dsa;
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struct r600_pipe_state *rstate;
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boolean quirk = false;
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if (rctx->family == CHIP_RV610 || rctx->family == CHIP_RV630 ||
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rctx->family == CHIP_RV620 || rctx->family == CHIP_RV635)
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quirk = true;
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memset(&dsa, 0, sizeof(dsa));
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if (quirk) {
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dsa.depth.enabled = 1;
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dsa.depth.func = PIPE_FUNC_LEQUAL;
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dsa.stencil[0].enabled = 1;
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dsa.stencil[0].func = PIPE_FUNC_ALWAYS;
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dsa.stencil[0].zpass_op = PIPE_STENCIL_OP_KEEP;
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dsa.stencil[0].zfail_op = PIPE_STENCIL_OP_INCR;
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dsa.stencil[0].writemask = 0xff;
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}
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rstate = rctx->context.create_depth_stencil_alpha_state(&rctx->context, &dsa);
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r600_pipe_state_add_reg(rstate, R600_GROUP_CONTEXT,
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R_02880C_DB_SHADER_CONTROL,
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0x0,
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S_02880C_DUAL_EXPORT_ENABLE(1), NULL);
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r600_pipe_state_add_reg(rstate, R600_GROUP_CONTEXT,
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R_028D0C_DB_RENDER_CONTROL,
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S_028D0C_DEPTH_COPY_ENABLE(1) |
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S_028D0C_STENCIL_COPY_ENABLE(1) |
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S_028D0C_COPY_CENTROID(1),
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S_028D0C_DEPTH_COPY_ENABLE(1) |
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S_028D0C_STENCIL_COPY_ENABLE(1) |
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S_028D0C_COPY_CENTROID(1), NULL);
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return rstate;
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}
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static struct pipe_context *r600_create_context2(struct pipe_screen *screen, void *priv)
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{
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struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
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@ -2215,6 +2251,9 @@ static struct pipe_context *r600_create_context2(struct pipe_screen *screen, voi
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return NULL;
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}
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LIST_INITHEAD(&rctx->query_list);
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rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
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return &rctx->context;
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}
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