i965: Drop index buffer re-alignment code.
This shouldn't ever happen - GL requires it to be aligned: "Clients must align data elements consistent with the requirements of the client platform, with an additional base-level requirement that an offset within a buffer to a datum comprising N basic machine units be a multiple of N." Mesa should reject unaligned index buffers for us - we shouldn't have to handle them in the driver. Note that Gallium already makes this assumption. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
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@ -711,7 +711,6 @@ brw_prepare_shader_draw_parameters(struct brw_context *brw)
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static void
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brw_upload_indices(struct brw_context *brw)
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{
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struct gl_context *ctx = &brw->ctx;
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const struct _mesa_index_buffer *index_buffer = brw->ib.ib;
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GLuint ib_size;
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struct brw_bo *old_bo = brw->ib.bo;
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@ -738,35 +737,14 @@ brw_upload_indices(struct brw_context *brw)
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} else {
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offset = (GLuint) (unsigned long) index_buffer->ptr;
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/* If the index buffer isn't aligned to its element size, we have to
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* rebase it into a temporary.
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*/
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if ((ib_type_size - 1) & offset) {
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perf_debug("copying index buffer to a temporary to work around "
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"misaligned offset %d\n", offset);
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GLubyte *map = ctx->Driver.MapBufferRange(ctx,
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offset,
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ib_size,
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GL_MAP_READ_BIT,
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bufferobj,
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MAP_INTERNAL);
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intel_upload_data(brw, map, ib_size, ib_type_size,
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&brw->ib.bo, &offset);
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brw->ib.size = brw->ib.bo->size;
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ctx->Driver.UnmapBuffer(ctx, bufferobj, MAP_INTERNAL);
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} else {
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struct brw_bo *bo =
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intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
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offset, ib_size);
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if (bo != brw->ib.bo) {
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brw_bo_unreference(brw->ib.bo);
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brw->ib.bo = bo;
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brw->ib.size = bufferobj->Size;
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brw_bo_reference(bo);
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}
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struct brw_bo *bo =
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intel_bufferobj_buffer(brw, intel_buffer_object(bufferobj),
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offset, ib_size);
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if (bo != brw->ib.bo) {
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brw_bo_unreference(brw->ib.bo);
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brw->ib.bo = bo;
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brw->ib.size = bufferobj->Size;
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brw_bo_reference(bo);
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}
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}
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