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freedreno/a6xx: Fix clip_mask 

The clip_mask needs to also take into account rast->clip_plane_enable

Fixes: f2ae8d116a ("freedreno/a6xx: Implement user clip/cull distances")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14643>
This commit is contained in:
Rob Clark 2022-01-20 15:32:34 -08:00 committed by Marge Bot
parent 5e2bd30ea4
commit d26cdfac2c
5 changed files with 14 additions and 2 deletions
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1
src/gallium/drivers/freedreno/a5xx/fd5_draw.c
View File

@ -87,6 +87,7 @@ fd5_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
.key = {
.rasterflat = ctx->rasterizer->flatshade,
},
.clip_plane_enable = ctx->rasterizer->clip_plane_enable,
},
.rasterflat = ctx->rasterizer->flatshade,
.sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,

3
src/gallium/drivers/freedreno/a6xx/fd6_context.c
View File

@ -151,7 +151,8 @@ setup_state_map(struct fd_context *ctx)
BIT(FD6_GROUP_ZSA));
fd_context_add_map(ctx, FD_DIRTY_ZSA | FD_DIRTY_BLEND | FD_DIRTY_PROG,
BIT(FD6_GROUP_LRZ) | BIT(FD6_GROUP_LRZ_BINNING));
fd_context_add_map(ctx, FD_DIRTY_PROG, BIT(FD6_GROUP_PROG));
fd_context_add_map(ctx, FD_DIRTY_PROG | FD_DIRTY_RASTERIZER_CLIP_PLANE_ENABLE,
BIT(FD6_GROUP_PROG));
fd_context_add_map(ctx, FD_DIRTY_RASTERIZER, BIT(FD6_GROUP_RASTERIZER));
fd_context_add_map(ctx,
FD_DIRTY_FRAMEBUFFER | FD_DIRTY_RASTERIZER_DISCARD |

3
src/gallium/drivers/freedreno/a6xx/fd6_draw.c
View File

@ -156,6 +156,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
.sample_shading = (ctx->min_samples > 1),
.msaa = (ctx->framebuffer.samples > 1),
},
.clip_plane_enable = ctx->rasterizer->clip_plane_enable,
},
.rasterflat = ctx->rasterizer->flatshade,
.sprite_coord_enable = ctx->rasterizer->sprite_coord_enable,
@ -195,7 +196,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
ir3_fixup_shader_state(&ctx->base, &emit.key.key);
if (!(ctx->dirty & FD_DIRTY_PROG)) {
if (!(ctx->gen_dirty & BIT(FD6_GROUP_PROG))) {
emit.prog = fd6_ctx->prog;
} else {
fd6_ctx->prog = fd6_emit_get_prog(&emit);

2
src/gallium/drivers/freedreno/a6xx/fd6_program.c
View File

@ -585,6 +585,8 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_context *ctx,
cull_mask = last_shader->cull_mask;
uint8_t clip_cull_mask = clip_mask | cull_mask;
clip_mask &= cache_key->clip_plane_enable;
/* If we have streamout, link against the real FS, rather than the
* dummy FS used for binning pass state, to ensure the OUTLOC's
* match. Depending on whether we end up doing sysmem or gmem,

7
src/gallium/drivers/freedreno/ir3/ir3_cache.h
View File

@ -27,6 +27,8 @@
#ifndef IR3_CACHE_H_
#define IR3_CACHE_H_
#include "pipe/p_state.h"
#include "ir3/ir3_shader.h"
/*
@ -39,6 +41,11 @@
struct ir3_cache_key {
struct ir3_shader_state *vs, *hs, *ds, *gs, *fs; // 5 pointers
struct ir3_shader_key key; // 7 dwords
/* Additional state that effects the cached program state, but
* not the compiled shader:
*/
unsigned clip_plane_enable : PIPE_MAX_CLIP_PLANES;
};
/* per-gen backend program state object should subclass this for it's