radeonsi: clear PIPE_IMAGE_ACCESS_WRITE when it's invalid to be on the safe side
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@ -688,6 +688,16 @@ static void si_set_shader_image_desc(struct si_context *ctx,
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unsigned level = view->u.tex.level;
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unsigned width, height, depth, hw_level;
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bool uses_dcc = vi_dcc_enabled(tex, level);
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unsigned access = view->access;
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/* Clear the write flag when writes can't occur.
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* Note that DCC_DECOMPRESS for MSAA doesn't work in some cases,
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* so we don't wanna trigger it.
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*/
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if (tex->is_depth || tex->resource.b.b.nr_samples >= 2) {
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assert(!"Z/S and MSAA image stores are not supported");
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access &= ~PIPE_IMAGE_ACCESS_WRITE;
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}
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assert(!tex->is_depth);
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assert(tex->fmask.size == 0);
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