virgl: native fence fd support
Following the support for fences on the virtio driver add support for native fence on virgl. This was somewhat based on the freedeno one. Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.com> Signed-off-by: Robert Foss <robert.foss@collabora.com> Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
This commit is contained in:
Robert Foss
parent
0db898cef2
commit
d1a1c21e76
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@ -21,6 +21,7 @@
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <libsync.h>
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#include "pipe/p_shader_tokens.h"
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#include "pipe/p_context.h"
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@ -709,13 +710,20 @@ static void virgl_draw_vbo(struct pipe_context *ctx,
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}
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static void virgl_flush_eq(struct virgl_context *ctx, void *closure)
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static void virgl_flush_eq(struct virgl_context *ctx, void *closure,
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struct pipe_fence_handle **fence)
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{
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struct virgl_screen *rs = virgl_screen(ctx->base.screen);
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int out_fence_fd = -1;
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/* send the buffer to the remote side for decoding */
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ctx->num_transfers = ctx->num_draws = 0;
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rs->vws->submit_cmd(rs->vws, ctx->cbuf);
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rs->vws->submit_cmd(rs->vws, ctx->cbuf, ctx->cbuf->in_fence_fd,
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ctx->cbuf->needs_out_fence_fd ? &out_fence_fd : NULL);
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if (fence)
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*fence = rs->vws->cs_create_fence(rs->vws, out_fence_fd);
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virgl_encoder_set_sub_ctx(ctx, ctx->hw_sub_ctx_id);
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@ -728,11 +736,10 @@ static void virgl_flush_from_st(struct pipe_context *ctx,
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enum pipe_flush_flags flags)
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{
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struct virgl_context *vctx = virgl_context(ctx);
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struct virgl_screen *rs = virgl_screen(ctx->screen);
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struct virgl_buffer *buf, *tmp;
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if (fence)
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*fence = rs->vws->cs_create_fence(rs->vws);
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if (flags & PIPE_FLUSH_FENCE_FD)
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vctx->cbuf->needs_out_fence_fd = true;
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LIST_FOR_EACH_ENTRY_SAFE(buf, tmp, &vctx->to_flush_bufs, flush_list) {
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struct pipe_resource *res = &buf->base.u.b;
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@ -742,7 +749,13 @@ static void virgl_flush_from_st(struct pipe_context *ctx,
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pipe_resource_reference(&res, NULL);
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}
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virgl_flush_eq(vctx, vctx);
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virgl_flush_eq(vctx, vctx, fence);
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if (vctx->cbuf->in_fence_fd != -1) {
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close(vctx->cbuf->in_fence_fd);
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vctx->cbuf->in_fence_fd = -1;
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}
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vctx->cbuf->needs_out_fence_fd = false;
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}
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static struct pipe_sampler_view *virgl_create_sampler_view(struct pipe_context *ctx,
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@ -1016,6 +1029,23 @@ static void virgl_set_shader_buffers(struct pipe_context *ctx,
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virgl_encode_set_shader_buffers(vctx, shader, start_slot, count, buffers);
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}
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static void virgl_create_fence_fd(struct pipe_context *ctx,
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struct pipe_fence_handle **fence, int fd)
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{
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struct virgl_screen *rs = virgl_screen(ctx->screen);
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*fence = rs->vws->cs_create_fence(rs->vws, fd);
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}
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static void virgl_fence_server_sync(struct pipe_context *ctx,
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struct pipe_fence_handle *fence)
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{
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struct virgl_context *vctx = virgl_context(ctx);
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struct virgl_screen *rs = virgl_screen(ctx->screen);
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rs->vws->fence_server_sync(rs->vws, vctx->cbuf, fence);
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}
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static void virgl_set_shader_images(struct pipe_context *ctx,
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enum pipe_shader_type shader,
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unsigned start_slot, unsigned count,
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@ -1108,7 +1138,7 @@ virgl_context_destroy( struct pipe_context *ctx )
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vctx->framebuffer.zsbuf = NULL;
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vctx->framebuffer.nr_cbufs = 0;
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virgl_encoder_destroy_sub_ctx(vctx, vctx->hw_sub_ctx_id);
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virgl_flush_eq(vctx, vctx);
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virgl_flush_eq(vctx, vctx, NULL);
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rs->vws->cmd_buf_destroy(vctx->cbuf);
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if (vctx->uploader)
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@ -1244,6 +1274,8 @@ struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
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vctx->base.resource_copy_region = virgl_resource_copy_region;
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vctx->base.flush_resource = virgl_flush_resource;
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vctx->base.blit = virgl_blit;
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vctx->base.create_fence_fd = virgl_create_fence_fd;
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vctx->base.fence_server_sync = virgl_fence_server_sync;
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vctx->base.set_shader_buffers = virgl_set_shader_buffers;
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vctx->base.set_hw_atomic_buffers = virgl_set_hw_atomic_buffers;
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@ -340,7 +340,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
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case PIPE_CAP_VIDEO_MEMORY:
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return 0;
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case PIPE_CAP_NATIVE_FENCE_FD:
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return 0;
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return !!vscreen->vws->supports_fences;
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default:
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return u_pipe_screen_get_param_defaults(screen, param);
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}
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@ -721,6 +721,15 @@ static boolean virgl_fence_finish(struct pipe_screen *screen,
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return vws->fence_wait(vws, fence, timeout);
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}
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static int virgl_fence_get_fd(struct pipe_screen *screen,
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struct pipe_fence_handle *fence)
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{
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struct virgl_screen *vscreen = virgl_screen(screen);
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struct virgl_winsys *vws = vscreen->vws;
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return vws->fence_get_fd(vws, fence);
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}
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static uint64_t
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virgl_get_timestamp(struct pipe_screen *_screen)
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{
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@ -765,6 +774,7 @@ virgl_create_screen(struct virgl_winsys *vws)
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screen->base.fence_reference = virgl_fence_reference;
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//screen->base.fence_signalled = virgl_fence_signalled;
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screen->base.fence_finish = virgl_fence_finish;
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screen->base.fence_get_fd = virgl_fence_get_fd;
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virgl_init_screen_resource_functions(&screen->base);
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@ -40,10 +40,13 @@ struct virgl_drm_caps {
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struct virgl_cmd_buf {
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unsigned cdw;
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uint32_t *buf;
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int in_fence_fd;
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bool needs_out_fence_fd;
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};
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struct virgl_winsys {
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unsigned pci_id;
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int supports_fences; /* In/Out fences are supported */
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void (*destroy)(struct virgl_winsys *vws);
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@ -83,7 +86,8 @@ struct virgl_winsys {
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void (*cmd_buf_destroy)(struct virgl_cmd_buf *buf);
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void (*emit_res)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf, struct virgl_hw_res *res, boolean write_buffer);
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int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf);
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int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf,
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int32_t in_fence_fd, int32_t *out_fence_fd);
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boolean (*res_is_referenced)(struct virgl_winsys *vws,
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struct virgl_cmd_buf *buf,
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@ -92,7 +96,7 @@ struct virgl_winsys {
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int (*get_caps)(struct virgl_winsys *vws, struct virgl_drm_caps *caps);
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/* fence */
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struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws);
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struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws, int fd);
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bool (*fence_wait)(struct virgl_winsys *vws,
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struct pipe_fence_handle *fence,
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uint64_t timeout);
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@ -107,6 +111,12 @@ struct virgl_winsys {
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unsigned level, unsigned layer,
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void *winsys_drawable_handle,
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struct pipe_box *sub_box);
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void (*fence_server_sync)(struct virgl_winsys *vws,
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struct virgl_cmd_buf *cbuf,
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struct pipe_fence_handle *fence);
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int (*fence_get_fd)(struct virgl_winsys *vws,
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struct pipe_fence_handle *fence);
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};
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/* this defaults all newer caps,
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@ -38,11 +38,17 @@
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#include "virgl/virgl_public.h"
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#include <xf86drm.h>
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#include <libsync.h>
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#include "virtgpu_drm.h"
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#include "virgl_drm_winsys.h"
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#include "virgl_drm_public.h"
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#define VIRGL_DRM_VERSION(major, minor) ((major) << 16 | (minor))
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#define VIRGL_DRM_VERSION_FENCE_FD VIRGL_DRM_VERSION(1, 0)
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static inline boolean can_cache_resource(struct virgl_hw_res *res)
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{
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return res->cacheable == TRUE;
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@ -70,6 +76,9 @@ static void virgl_hw_res_destroy(struct virgl_drm_winsys *qdws,
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if (res->ptr)
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os_munmap(res->ptr, res->size);
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if (res->fence_fd != -1)
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close(res->fence_fd);
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memset(&args, 0, sizeof(args));
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args.handle = res->bo_handle;
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drmIoctl(qdws->fd, DRM_IOCTL_GEM_CLOSE, &args);
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@ -222,6 +231,7 @@ virgl_drm_winsys_resource_create(struct virgl_winsys *qws,
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res->stride = stride;
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pipe_reference_init(&res->reference, 1);
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res->num_cs_references = 0;
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res->fence_fd = -1;
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return res;
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}
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@ -457,6 +467,7 @@ virgl_drm_winsys_resource_create_handle(struct virgl_winsys *qws,
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res->stride = info_arg.stride;
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pipe_reference_init(&res->reference, 1);
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res->num_cs_references = 0;
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res->fence_fd = -1;
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util_hash_table_set(qdws->bo_handles, (void *)(uintptr_t)handle, res);
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@ -577,6 +588,7 @@ static struct virgl_cmd_buf *virgl_drm_cmd_buf_create(struct virgl_winsys *qws)
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}
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cbuf->base.buf = cbuf->buf;
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cbuf->base.in_fence_fd = -1;
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return &cbuf->base;
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}
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@ -687,7 +699,8 @@ static boolean virgl_drm_res_is_ref(struct virgl_winsys *qws,
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}
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static int virgl_drm_winsys_submit_cmd(struct virgl_winsys *qws,
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struct virgl_cmd_buf *_cbuf)
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struct virgl_cmd_buf *_cbuf,
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int in_fence_fd, int *out_fence_fd)
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{
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struct virgl_drm_winsys *qdws = virgl_drm_winsys(qws);
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struct virgl_drm_cmd_buf *cbuf = virgl_drm_cmd_buf(_cbuf);
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@ -702,12 +715,24 @@ static int virgl_drm_winsys_submit_cmd(struct virgl_winsys *qws,
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eb.size = cbuf->base.cdw * 4;
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eb.num_bo_handles = cbuf->cres;
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eb.bo_handles = (unsigned long)(void *)cbuf->res_hlist;
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eb.fence_fd = -1;
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if (in_fence_fd != -1) {
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eb.flags |= VIRTGPU_EXECBUF_FENCE_FD_IN;
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eb.fence_fd = in_fence_fd;
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}
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if (out_fence_fd != NULL)
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eb.flags |= VIRTGPU_EXECBUF_FENCE_FD_OUT;
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ret = drmIoctl(qdws->fd, DRM_IOCTL_VIRTGPU_EXECBUFFER, &eb);
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if (ret == -1)
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fprintf(stderr,"got error from kernel - expect bad rendering %d\n", errno);
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cbuf->base.cdw = 0;
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if (out_fence_fd != NULL)
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*out_fence_fd = eb.fence_fd;
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virgl_drm_release_all_res(qdws, cbuf);
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memset(cbuf->is_handle_added, 0, sizeof(cbuf->is_handle_added));
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@ -759,7 +784,7 @@ static int handle_compare(void *key1, void *key2)
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}
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static struct pipe_fence_handle *
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virgl_cs_create_fence(struct virgl_winsys *vws)
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virgl_cs_create_fence(struct virgl_winsys *vws, int fd)
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{
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struct virgl_hw_res *res;
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@ -769,6 +794,7 @@ virgl_cs_create_fence(struct virgl_winsys *vws)
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VIRGL_BIND_CUSTOM,
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8, 1, 1, 0, 0, 0, 8);
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res->fence_fd = fd;
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return (struct pipe_fence_handle *)res;
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}
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@ -793,6 +819,12 @@ static bool virgl_fence_wait(struct virgl_winsys *vws,
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return TRUE;
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}
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virgl_drm_resource_wait(vws, res);
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if (res->fence_fd != -1) {
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int ret = sync_wait(res->fence_fd, timeout / 1000000);
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return ret == 0;
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}
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return TRUE;
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}
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@ -805,11 +837,51 @@ static void virgl_fence_reference(struct virgl_winsys *vws,
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virgl_hw_res(src));
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}
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static void virgl_fence_server_sync(struct virgl_winsys *vws,
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struct virgl_cmd_buf *cbuf,
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struct pipe_fence_handle *fence)
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{
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struct virgl_hw_res *hw_res = virgl_hw_res(fence);
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/* if not an external fence, then nothing more to do without preemption: */
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if (hw_res->fence_fd == -1)
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return;
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sync_accumulate("virgl", &cbuf->in_fence_fd, hw_res->fence_fd);
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}
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static int virgl_fence_get_fd(struct virgl_winsys *vws,
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struct pipe_fence_handle *fence)
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{
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struct virgl_hw_res *hw_res = virgl_hw_res(fence);
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return dup(hw_res->fence_fd);
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}
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static int virgl_drm_get_version(int fd)
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{
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int ret;
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drmVersionPtr version;
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version = drmGetVersion(fd);
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if (!version)
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ret = -EFAULT;
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else if (version->version_major != 0)
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ret = -EINVAL;
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else
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ret = version->version_minor;
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drmFreeVersion(version);
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return ret;
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}
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static struct virgl_winsys *
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virgl_drm_winsys_create(int drmFD)
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{
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struct virgl_drm_winsys *qdws;
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int drm_version;
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int ret;
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int gl = 0;
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struct drm_virtgpu_getparam getparam = {0};
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@ -820,6 +892,10 @@ virgl_drm_winsys_create(int drmFD)
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if (ret < 0 || !gl)
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return NULL;
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drm_version = virgl_drm_get_version(qdws->fd);
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if (drm_version < 0)
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return NULL;
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qdws = CALLOC_STRUCT(virgl_drm_winsys);
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if (!qdws)
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return NULL;
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@ -851,9 +927,13 @@ virgl_drm_winsys_create(int drmFD)
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qdws->base.cs_create_fence = virgl_cs_create_fence;
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qdws->base.fence_wait = virgl_fence_wait;
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qdws->base.fence_reference = virgl_fence_reference;
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qdws->base.fence_server_sync = virgl_fence_server_sync;
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qdws->base.fence_get_fd = virgl_fence_get_fd;
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qdws->base.supports_fences = drm_version >= VIRGL_DRM_VERSION_FENCE_FD;
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qdws->base.get_caps = virgl_drm_get_caps;
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uint32_t value = 0;
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getparam.param = VIRTGPU_PARAM_CAPSET_QUERY_FIX;
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getparam.value = (uint64_t)(uintptr_t)&value;
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@ -50,12 +50,14 @@ struct virgl_hw_res {
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int64_t start, end;
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boolean flinked;
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uint32_t flink;
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int fence_fd;
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};
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struct virgl_drm_winsys
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{
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struct virgl_winsys base;
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int fd;
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int drm_version;
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struct list_head delayed;
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int num_delayed;
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unsigned usecs;
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@ -44,6 +44,16 @@
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#define DRM_VIRTGPU_WAIT 0x08
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#define DRM_VIRTGPU_GET_CAPS 0x09
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/*
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* virtgpu execbuffer flags
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*/
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#define VIRTGPU_EXECBUF_FENCE_FD_IN 0x01
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#define VIRTGPU_EXECBUF_FENCE_FD_OUT 0x02
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#define VIRTGPU_EXECBUF_FLAGS (\
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VIRTGPU_EXECBUF_FENCE_FD_IN |\
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VIRTGPU_EXECBUF_FENCE_FD_OUT |\
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0)
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||||
|
||||
struct drm_virtgpu_map {
|
||||
uint64_t offset; /* use for mmap system call */
|
||||
uint32_t handle;
|
||||
|
|
@ -56,7 +66,7 @@ struct drm_virtgpu_execbuffer {
|
|||
uint64_t command; /* void* */
|
||||
uint64_t bo_handles;
|
||||
uint32_t num_bo_handles;
|
||||
uint32_t pad;
|
||||
int32_t fence_fd;
|
||||
};
|
||||
|
||||
#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
|
||||
|
|
@ -130,7 +140,7 @@ struct drm_virtgpu_get_caps {
|
|||
DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_MAP, struct drm_virtgpu_map)
|
||||
|
||||
#define DRM_IOCTL_VIRTGPU_EXECBUFFER \
|
||||
DRM_IOW(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
|
||||
DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_EXECBUFFER,\
|
||||
struct drm_virtgpu_execbuffer)
|
||||
|
||||
#define DRM_IOCTL_VIRTGPU_GETPARAM \
|
||||
|
|
|
|||
|
|
@ -501,7 +501,8 @@ static void virgl_vtest_add_res(struct virgl_vtest_winsys *vtws,
|
|||
}
|
||||
|
||||
static int virgl_vtest_winsys_submit_cmd(struct virgl_winsys *vws,
|
||||
struct virgl_cmd_buf *_cbuf)
|
||||
struct virgl_cmd_buf *_cbuf,
|
||||
int in_fence_fd, int *out_fence_fd)
|
||||
{
|
||||
struct virgl_vtest_winsys *vtws = virgl_vtest_winsys(vws);
|
||||
struct virgl_vtest_cmd_buf *cbuf = virgl_vtest_cmd_buf(_cbuf);
|
||||
|
|
@ -510,6 +511,9 @@ static int virgl_vtest_winsys_submit_cmd(struct virgl_winsys *vws,
|
|||
if (cbuf->base.cdw == 0)
|
||||
return 0;
|
||||
|
||||
assert(in_fence_fd == -1);
|
||||
assert(out_fence_fd == NULL);
|
||||
|
||||
ret = virgl_vtest_submit_cmd(vtws, cbuf);
|
||||
|
||||
virgl_vtest_release_all_res(vtws, cbuf);
|
||||
|
|
@ -552,7 +556,7 @@ static int virgl_vtest_get_caps(struct virgl_winsys *vws,
|
|||
}
|
||||
|
||||
static struct pipe_fence_handle *
|
||||
virgl_cs_create_fence(struct virgl_winsys *vws)
|
||||
virgl_cs_create_fence(struct virgl_winsys *vws, int fd)
|
||||
{
|
||||
struct virgl_hw_res *res;
|
||||
|
||||
|
|
@ -694,8 +698,10 @@ virgl_vtest_winsys_wrap(struct sw_winsys *sws)
|
|||
vtws->base.cs_create_fence = virgl_cs_create_fence;
|
||||
vtws->base.fence_wait = virgl_fence_wait;
|
||||
vtws->base.fence_reference = virgl_fence_reference;
|
||||
vtws->base.supports_fences = 0;
|
||||
|
||||
vtws->base.flush_frontbuffer = virgl_vtest_flush_frontbuffer;
|
||||
|
||||
|
||||
return &vtws->base;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue