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nvc0: change TGSI CMP translation to use slct 

Saves us the explicit compare instruction needed with selp.
This commit is contained in:
Christoph Bumiller 2011-02-23 17:29:02 +01:00
parent b0bf4ee85f
commit d0caaba370
3 changed files with 15 additions and 8 deletions
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11
src/gallium/drivers/nvc0/nvc0_pc_optimize.c
View File

@ -245,7 +245,9 @@ check_swap_src_0_1(struct nv_instruction *nvi)
struct nv_ref *src0 = nvi->src[0]; struct nv_ref *src0 = nvi->src[0];
struct nv_ref *src1 = nvi->src[1]; struct nv_ref *src1 = nvi->src[1];
if (!nv_op_commutative(nvi->opcode) && NV_BASEOP(nvi->opcode) != NV_OP_SET) if (!nv_op_commutative(nvi->opcode) &&
NV_BASEOP(nvi->opcode) != NV_OP_SET &&
NV_BASEOP(nvi->opcode) != NV_OP_SLCT)
return; return;
assert(src0 && src1 && src0->value && src1->value); assert(src0 && src1 && src0->value && src1->value);
@ -266,8 +268,13 @@ check_swap_src_0_1(struct nv_instruction *nvi)
} }
} }
if (nvi->src[0] != src0 && NV_BASEOP(nvi->opcode) == NV_OP_SET) if (nvi->src[0] != src0) {
if (NV_BASEOP(nvi->opcode) == NV_OP_SET)
nvi->set_cond = (nvi->set_cond & ~7) | cc_swapped[nvi->set_cond & 7]; nvi->set_cond = (nvi->set_cond & ~7) | cc_swapped[nvi->set_cond & 7];
else
if (NV_BASEOP(nvi->opcode) == NV_OP_SLCT)
nvi->set_cond = NV_CC_INVERSE(nvi->set_cond);
}
} }
static void static void

6
src/gallium/drivers/nvc0/nvc0_pc_print.c
View File

@ -363,9 +363,9 @@ struct nv_op_info nvc0_op_info_table[NV_OP_COUNT + 1] =
{ NV_OP_SELP, "selp", NV_TYPE_U32, 0, 0, 0, 0, 1, 0, 0, 0 }, { NV_OP_SELP, "selp", NV_TYPE_U32, 0, 0, 0, 0, 1, 0, 0, 0 },
{ NV_OP_SLCT_F32, "slct", NV_TYPE_F32, 0, 0, 0, 0, 1, 0, 0, 0 }, { NV_OP_SLCT, "slct", NV_TYPE_F32, 0, 0, 0, 0, 1, 0, 2, 2 },
{ NV_OP_SLCT_F32, "slct", NV_TYPE_S32, 0, 0, 0, 0, 1, 0, 0, 0 }, { NV_OP_SLCT, "slct", NV_TYPE_S32, 0, 0, 0, 0, 1, 0, 2, 2 },
{ NV_OP_SLCT_F32, "slct", NV_TYPE_U32, 0, 0, 0, 0, 1, 0, 0, 0 }, { NV_OP_SLCT, "slct", NV_TYPE_U32, 0, 0, 0, 0, 1, 0, 2, 2 },
{ NV_OP_ADD, "sub", NV_TYPE_F32, 0, 0, 0, 0, 1, 0, 1, 0 }, { NV_OP_ADD, "sub", NV_TYPE_F32, 0, 0, 0, 0, 1, 0, 1, 0 },

4
src/gallium/drivers/nvc0/nvc0_tgsi_to_nc.c
View File

@ -1493,10 +1493,10 @@ bld_instruction(struct bld_context *bld,
case TGSI_OPCODE_CMP: case TGSI_OPCODE_CMP:
FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) { FOR_EACH_DST0_ENABLED_CHANNEL(c, insn) {
src0 = emit_fetch(bld, insn, 0, c); src0 = emit_fetch(bld, insn, 0, c);
src0 = bld_setp(bld, NV_OP_SET_F32, NV_CC_LT, src0, bld->zero);
src1 = emit_fetch(bld, insn, 1, c); src1 = emit_fetch(bld, insn, 1, c);
src2 = emit_fetch(bld, insn, 2, c); src2 = emit_fetch(bld, insn, 2, c);
dst0[c] = bld_insn_3(bld, NV_OP_SELP, src1, src2, src0); dst0[c] = bld_insn_3(bld, NV_OP_SLCT_F32, src1, src2, src0);
dst0[c]->insn->set_cond = NV_CC_LT;
} }
break; break;
case TGSI_OPCODE_COS: case TGSI_OPCODE_COS: