radeonsi/gfx10: add NGG registers to si_init_config
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
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@ -5539,6 +5539,21 @@ static void si_init_config(struct si_context *sctx)
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S_00B01C_CU_EN(0xffff) | S_00B01C_WAVE_LIMIT(0x3F));
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}
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if (sctx->chip_class >= GFX10) {
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/* Break up a pixel wave if it contains deallocs for more than
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* half the parameter cache.
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*
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* To avoid a deadlock where pixel waves aren't launched
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* because they're waiting for more pixels while the frontend
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* is stuck waiting for PC space, the maximum allowed value is
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* the size of the PC minus the largest possible allocation for
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* a single primitive shader subgroup.
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*/
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si_pm4_set_reg(pm4, R_028C50_PA_SC_NGG_MODE_CNTL,
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S_028C50_MAX_DEALLOCS_IN_WAVE(512));
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si_pm4_set_reg(pm4, R_028838_PA_CL_NGG_CNTL, 0); /* TODO edge flags? */
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}
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if (sctx->chip_class >= GFX8) {
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unsigned vgt_tess_distribution;
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