i965/vec4: fix VEC4_OPCODE_FROM_DOUBLE for IVB/BYT
In the generator we must generate slightly different code for Ivybridge/Baytrail, because of the way the stride works in this hardware. v2: - Use stride and don't need to fix dst (Curro) Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com> Reviewed-by: Francisco Jerez <currojerez@riseup.net>
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@ -1946,16 +1946,28 @@ generate_code(struct brw_codegen *p,
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brw_set_default_access_mode(p, BRW_ALIGN_1);
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dst.hstride = BRW_HORIZONTAL_STRIDE_2;
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dst.width = BRW_WIDTH_4;
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/* When converting from DF->F, we set destination's stride as 2 as an
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* aligment requirement. But in IVB/BYT, each DF implicitly writes
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* two floats, being the first one the converted value. So we don't
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* need to explicitly set stride 2, but 1.
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*/
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struct brw_reg spread_dst;
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if (devinfo->gen == 7 && !devinfo->is_haswell)
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spread_dst = stride(dst, 8, 4, 1);
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else
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spread_dst = stride(dst, 8, 4, 2);
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src[0].vstride = BRW_VERTICAL_STRIDE_4;
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src[0].width = BRW_WIDTH_4;
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brw_MOV(p, dst, src[0]);
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brw_MOV(p, spread_dst, src[0]);
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struct brw_reg dst_as_src = dst;
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dst.hstride = BRW_HORIZONTAL_STRIDE_1;
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dst.width = BRW_WIDTH_8;
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brw_MOV(p, dst, dst_as_src);
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/* As we have set horizontal stride 1 instead of 2 in IVB/BYT, we
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* need to fix it here to have the expected value.
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*/
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if (devinfo->gen == 7 && !devinfo->is_haswell)
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spread_dst = stride(dst, 8, 4, 2);
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brw_MOV(p, dst, spread_dst);
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brw_set_default_access_mode(p, BRW_ALIGN_16);
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break;
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