tu: Move tu_render_pass definition up
So that we can embed one in tu_cmd_buffer. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17378>
This commit is contained in:
Connor Abbott
Marge Bot
parent
2b8b5259c7
commit
cf391db4c6
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@ -910,6 +910,136 @@ tu_get_debug_option_name(int id);
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const char *
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tu_get_perftest_option_name(int id);
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struct tu_attachment_info
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{
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struct tu_image_view *attachment;
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};
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struct tu_framebuffer
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{
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struct vk_object_base base;
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uint32_t width;
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uint32_t height;
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uint32_t layers;
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/* size of the first tile */
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VkExtent2D tile0;
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/* number of tiles */
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VkExtent2D tile_count;
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/* size of the first VSC pipe */
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VkExtent2D pipe0;
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/* number of VSC pipes */
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VkExtent2D pipe_count;
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/* Whether binning should be used for gmem rendering using this framebuffer. */
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bool binning;
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/* Whether binning could be used for gmem rendering using this framebuffer. */
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bool binning_possible;
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/* pipe register values */
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uint32_t pipe_config[MAX_VSC_PIPES];
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uint32_t pipe_sizes[MAX_VSC_PIPES];
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uint32_t attachment_count;
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struct tu_attachment_info attachments[0];
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};
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struct tu_subpass_barrier {
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VkPipelineStageFlags2 src_stage_mask;
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VkPipelineStageFlags2 dst_stage_mask;
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VkAccessFlags2 src_access_mask;
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VkAccessFlags2 dst_access_mask;
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bool incoherent_ccu_color, incoherent_ccu_depth;
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};
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struct tu_subpass_attachment
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{
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uint32_t attachment;
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/* For input attachments, true if it needs to be patched to refer to GMEM
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* in GMEM mode. This is false if it hasn't already been written as an
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* attachment.
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*/
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bool patch_input_gmem;
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};
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struct tu_subpass
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{
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uint32_t input_count;
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uint32_t color_count;
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uint32_t resolve_count;
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bool resolve_depth_stencil;
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bool feedback_loop_color;
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bool feedback_loop_ds;
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/* True if we must invalidate UCHE thanks to a feedback loop. */
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bool feedback_invalidate;
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/* In other words - framebuffer fetch support */
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bool raster_order_attachment_access;
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struct tu_subpass_attachment *input_attachments;
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struct tu_subpass_attachment *color_attachments;
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struct tu_subpass_attachment *resolve_attachments;
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struct tu_subpass_attachment depth_stencil_attachment;
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VkSampleCountFlagBits samples;
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uint32_t srgb_cntl;
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uint32_t multiview_mask;
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struct tu_subpass_barrier start_barrier;
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};
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struct tu_render_pass_attachment
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{
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VkFormat format;
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uint32_t samples;
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uint32_t cpp;
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VkImageAspectFlags clear_mask;
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uint32_t clear_views;
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bool load;
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bool store;
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int32_t gmem_offset;
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bool will_be_resolved;
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/* for D32S8 separate stencil: */
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bool load_stencil;
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bool store_stencil;
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bool cond_load_allowed;
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bool cond_store_allowed;
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int32_t gmem_offset_stencil;
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};
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struct tu_render_pass
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{
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struct vk_object_base base;
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uint32_t attachment_count;
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uint32_t subpass_count;
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uint32_t gmem_pixels;
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uint32_t tile_align_w;
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/* memory bandwidth costs (in bytes) for gmem / sysmem rendering */
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uint32_t gmem_bandwidth_per_pixel;
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uint32_t sysmem_bandwidth_per_pixel;
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struct tu_subpass_attachment *subpass_attachments;
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struct tu_render_pass_attachment *attachments;
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struct tu_subpass_barrier end_barrier;
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struct tu_subpass subpasses[0];
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};
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void
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tu_framebuffer_tiling_config(struct tu_framebuffer *fb,
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const struct tu_device *device,
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const struct tu_render_pass *pass);
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struct tu_descriptor_state
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{
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struct tu_descriptor_set *sets[MAX_SETS];
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@ -1896,136 +2026,6 @@ tu_buffer_view_init(struct tu_buffer_view *view,
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struct tu_device *device,
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const VkBufferViewCreateInfo *pCreateInfo);
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struct tu_attachment_info
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{
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struct tu_image_view *attachment;
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};
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struct tu_framebuffer
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{
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struct vk_object_base base;
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uint32_t width;
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uint32_t height;
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uint32_t layers;
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/* size of the first tile */
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VkExtent2D tile0;
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/* number of tiles */
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VkExtent2D tile_count;
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/* size of the first VSC pipe */
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VkExtent2D pipe0;
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/* number of VSC pipes */
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VkExtent2D pipe_count;
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/* Whether binning should be used for gmem rendering using this framebuffer. */
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bool binning;
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/* Whether binning could be used for gmem rendering using this framebuffer. */
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bool binning_possible;
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/* pipe register values */
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uint32_t pipe_config[MAX_VSC_PIPES];
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uint32_t pipe_sizes[MAX_VSC_PIPES];
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uint32_t attachment_count;
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struct tu_attachment_info attachments[0];
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};
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void
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tu_framebuffer_tiling_config(struct tu_framebuffer *fb,
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const struct tu_device *device,
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const struct tu_render_pass *pass);
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struct tu_subpass_barrier {
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VkPipelineStageFlags2 src_stage_mask;
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VkPipelineStageFlags2 dst_stage_mask;
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VkAccessFlags2 src_access_mask;
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VkAccessFlags2 dst_access_mask;
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bool incoherent_ccu_color, incoherent_ccu_depth;
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};
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struct tu_subpass_attachment
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{
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uint32_t attachment;
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/* For input attachments, true if it needs to be patched to refer to GMEM
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* in GMEM mode. This is false if it hasn't already been written as an
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* attachment.
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*/
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bool patch_input_gmem;
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};
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struct tu_subpass
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{
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uint32_t input_count;
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uint32_t color_count;
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uint32_t resolve_count;
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bool resolve_depth_stencil;
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bool feedback_loop_color;
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bool feedback_loop_ds;
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/* True if we must invalidate UCHE thanks to a feedback loop. */
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bool feedback_invalidate;
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/* In other words - framebuffer fetch support */
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bool raster_order_attachment_access;
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struct tu_subpass_attachment *input_attachments;
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struct tu_subpass_attachment *color_attachments;
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struct tu_subpass_attachment *resolve_attachments;
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struct tu_subpass_attachment depth_stencil_attachment;
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VkSampleCountFlagBits samples;
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uint32_t srgb_cntl;
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uint32_t multiview_mask;
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struct tu_subpass_barrier start_barrier;
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};
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struct tu_render_pass_attachment
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{
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VkFormat format;
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uint32_t samples;
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uint32_t cpp;
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VkImageAspectFlags clear_mask;
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uint32_t clear_views;
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bool load;
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bool store;
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int32_t gmem_offset;
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bool will_be_resolved;
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/* for D32S8 separate stencil: */
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bool load_stencil;
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bool store_stencil;
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bool cond_load_allowed;
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bool cond_store_allowed;
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int32_t gmem_offset_stencil;
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};
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struct tu_render_pass
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{
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struct vk_object_base base;
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uint32_t attachment_count;
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uint32_t subpass_count;
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uint32_t gmem_pixels;
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uint32_t tile_align_w;
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/* memory bandwidth costs (in bytes) for gmem / sysmem rendering */
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uint32_t gmem_bandwidth_per_pixel;
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uint32_t sysmem_bandwidth_per_pixel;
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struct tu_subpass_attachment *subpass_attachments;
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struct tu_render_pass_attachment *attachments;
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struct tu_subpass_barrier end_barrier;
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struct tu_subpass subpasses[0];
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};
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#define PERF_CNTRS_REG 4
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struct tu_perf_query_data
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