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turnip: don't hardcode gmem base for input attachment 

Newer a6xx no longer has programmable GMEM base, so we can't rely on the
kernel driver setting it to 0x100000 (GMEM base is 0 on such GPUs).

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3979>
This commit is contained in:
Jonathan Marek 2020-02-27 11:18:45 -05:00 committed by Marge Bot
parent 6420406f19
commit cf302c9a22
4 changed files with 19 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/freedreno/vulkan/tu_cmd_buffer.c
View File

@ -2771,7 +2771,7 @@ write_tex_const(struct tu_cmd_buffer *cmd,
A6XX_TEX_CONST_2_TYPE(A6XX_TEX_2D) |
A6XX_TEX_CONST_2_PITCH(tiling->tile0.extent.width * att->cpp);
dst[3] = 0;
dst[4] = 0x100000 + att->gmem_offset;
dst[4] = cmd->device->physical_device->gmem_base + att->gmem_offset;
dst[5] = A6XX_TEX_CONST_5_DEPTH(1);
for (unsigned i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
dst[i] = 0;

8
src/freedreno/vulkan/tu_device.c
View File

@ -252,6 +252,14 @@ tu_physical_device_init(struct tu_physical_device *device,
goto fail;
}
if (tu_drm_get_gmem_base(device, &device->gmem_base)) {
if (instance->debug_flags & TU_DEBUG_STARTUP)
tu_logi("Could not query the GMEM size");
result = vk_errorf(instance, VK_ERROR_INITIALIZATION_FAILED,
"could not get GMEM size");
goto fail;
}
memset(device->name, 0, sizeof(device->name));
sprintf(device->name, "FD%d", device->gpu_id);

6
src/freedreno/vulkan/tu_drm.c
View File

@ -79,6 +79,12 @@ tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size)
return 0;
}
int
tu_drm_get_gmem_base(const struct tu_physical_device *dev, uint64_t *base)
{
return tu_drm_get_param(dev, MSM_PARAM_GMEM_BASE, base);
}
int
tu_drm_submitqueue_new(const struct tu_device *dev,
int priority,

4
src/freedreno/vulkan/tu_private.h
View File

@ -313,6 +313,7 @@ struct tu_physical_device
unsigned gpu_id;
uint32_t gmem_size;
uint64_t gmem_base;
uint32_t tile_align_w;
uint32_t tile_align_h;
@ -1624,6 +1625,9 @@ tu_drm_get_gpu_id(const struct tu_physical_device *dev, uint32_t *id);
int
tu_drm_get_gmem_size(const struct tu_physical_device *dev, uint32_t *size);
int
tu_drm_get_gmem_base(const struct tu_physical_device *dev, uint64_t *base);
int
tu_drm_submitqueue_new(const struct tu_device *dev,
int priority,