pan/mdg: remove unused arg from ALU_CHECK_CMP and ALU_CASE_CMP
Since commit eb28a366
there's no need for the sext parameter.
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6837>
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@ -672,7 +672,7 @@ nir_is_non_scalar_swizzle(nir_alu_src *src, unsigned nr_components)
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roundmode = MIDGARD_RTZ; \
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break;
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#define ALU_CHECK_CMP(sext) \
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#define ALU_CHECK_CMP() \
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assert(src_bitsize == 16 || src_bitsize == 32); \
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assert(dst_bitsize == 16 || dst_bitsize == 32); \
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@ -680,13 +680,13 @@ nir_is_non_scalar_swizzle(nir_alu_src *src, unsigned nr_components)
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case nir_op_##nir: \
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op = midgard_alu_op_##_op; \
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broadcast_swizzle = count; \
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ALU_CHECK_CMP(true); \
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ALU_CHECK_CMP(); \
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break;
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#define ALU_CASE_CMP(nir, _op, sext) \
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#define ALU_CASE_CMP(nir, _op) \
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case nir_op_##nir: \
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op = midgard_alu_op_##_op; \
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ALU_CHECK_CMP(sext); \
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ALU_CHECK_CMP(); \
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break;
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/* Compare mir_lower_invert */
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@ -902,13 +902,13 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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ALU_CASE(mov, imov);
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ALU_CASE_CMP(feq32, feq, false);
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ALU_CASE_CMP(fneu32, fne, false);
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ALU_CASE_CMP(flt32, flt, false);
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ALU_CASE_CMP(ieq32, ieq, true);
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ALU_CASE_CMP(ine32, ine, true);
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ALU_CASE_CMP(ilt32, ilt, true);
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ALU_CASE_CMP(ult32, ult, false);
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ALU_CASE_CMP(feq32, feq);
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ALU_CASE_CMP(fneu32, fne);
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ALU_CASE_CMP(flt32, flt);
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ALU_CASE_CMP(ieq32, ieq);
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ALU_CASE_CMP(ine32, ine);
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ALU_CASE_CMP(ilt32, ilt);
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ALU_CASE_CMP(ult32, ult);
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/* We don't have a native b2f32 instruction. Instead, like many
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* GPUs, we exploit booleans as 0/~0 for false/true, and
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@ -921,15 +921,15 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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* At the end of emit_alu (as MIR), we'll fix-up the constant
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*/
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ALU_CASE_CMP(b2f32, iand, true);
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ALU_CASE_CMP(b2f16, iand, true);
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ALU_CASE_CMP(b2i32, iand, true);
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ALU_CASE_CMP(b2f32, iand);
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ALU_CASE_CMP(b2f16, iand);
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ALU_CASE_CMP(b2i32, iand);
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/* Likewise, we don't have a dedicated f2b32 instruction, but
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* we can do a "not equal to 0.0" test. */
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ALU_CASE_CMP(f2b32, fne, false);
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ALU_CASE_CMP(i2b32, ine, true);
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ALU_CASE_CMP(f2b32, fne);
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ALU_CASE_CMP(i2b32, ine);
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ALU_CASE(frcp, frcp);
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ALU_CASE(frsq, frsqrt);
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@ -970,19 +970,19 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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ALU_CASE_BCAST(b32all_fequal2, fball_eq, 2);
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ALU_CASE_BCAST(b32all_fequal3, fball_eq, 3);
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ALU_CASE_CMP(b32all_fequal4, fball_eq, true);
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ALU_CASE_CMP(b32all_fequal4, fball_eq);
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ALU_CASE_BCAST(b32any_fnequal2, fbany_neq, 2);
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ALU_CASE_BCAST(b32any_fnequal3, fbany_neq, 3);
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ALU_CASE_CMP(b32any_fnequal4, fbany_neq, true);
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ALU_CASE_CMP(b32any_fnequal4, fbany_neq);
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ALU_CASE_BCAST(b32all_iequal2, iball_eq, 2);
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ALU_CASE_BCAST(b32all_iequal3, iball_eq, 3);
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ALU_CASE_CMP(b32all_iequal4, iball_eq, true);
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ALU_CASE_CMP(b32all_iequal4, iball_eq);
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ALU_CASE_BCAST(b32any_inequal2, ibany_neq, 2);
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ALU_CASE_BCAST(b32any_inequal3, ibany_neq, 3);
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ALU_CASE_CMP(b32any_inequal4, ibany_neq, true);
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ALU_CASE_CMP(b32any_inequal4, ibany_neq);
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/* Source mods will be shoved in later */
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ALU_CASE(fabs, fmov);
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@ -1033,7 +1033,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
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0;
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flip_src12 = true;
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ALU_CHECK_CMP(false);
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ALU_CHECK_CMP();
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break;
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}
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