zink: break out image descriptor updating
all the descriptor updates are now broken out, so update_descriptors is now just a dispatch for calling the other update functions Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9348>
This commit is contained in:
Mike Blumenkrantz
Marge Bot
parent
eb375dc939
commit
ce0524f009
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@ -659,22 +659,21 @@ update_sampler_descriptors(struct zink_context *ctx, struct zink_descriptor_set
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return bind_descriptors(ctx, zds, num_wds, wds, num_resources, resources, NULL, 0, is_compute, cache_hit);
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}
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static void
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update_descriptors(struct zink_context *ctx, struct zink_screen *screen, bool is_compute)
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static bool
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update_image_descriptors(struct zink_context *ctx, struct zink_descriptor_set *zds, struct zink_transition *transitions, int *num_transitions,
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struct set *transition_hash, bool is_compute, bool cache_hit)
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{
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struct zink_program *pg = is_compute ? (struct zink_program *)ctx->curr_compute : (struct zink_program *)ctx->curr_program;
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unsigned num_descriptors = zink_program_num_descriptors(pg);
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struct zink_program *pg = zds->pg;
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struct zink_screen *screen = zink_screen(ctx->base.screen);
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unsigned num_descriptors = pg->num_descriptors[zds->type];
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unsigned num_bindings = zink_program_num_bindings(pg, is_compute);
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unsigned num_image_bindings = zink_program_num_bindings_typed(pg, ZINK_DESCRIPTOR_TYPE_IMAGE, is_compute);
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VkWriteDescriptorSet wds[ZINK_DESCRIPTOR_TYPES][num_descriptors];
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struct zink_descriptor_resource resources[ZINK_DESCRIPTOR_TYPES][num_bindings];
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struct zink_surface *surface_refs[num_image_bindings];
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VkDescriptorImageInfo image_infos[ZINK_DESCRIPTOR_TYPES][num_bindings];
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VkWriteDescriptorSet wds[num_descriptors];
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struct zink_descriptor_resource resources[num_bindings];
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VkDescriptorImageInfo image_infos[num_bindings];
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VkBufferView buffer_view[] = {VK_NULL_HANDLE};
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unsigned num_wds[ZINK_DESCRIPTOR_TYPES] = {0};
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unsigned num_image_info[ZINK_DESCRIPTOR_TYPES] = {0};
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unsigned num_surface_refs = 0;
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unsigned num_resources[ZINK_DESCRIPTOR_TYPES] = {0};
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unsigned num_wds = 0;
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unsigned num_image_info = 0;
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unsigned num_resources = 0;
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struct zink_shader **stages;
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unsigned num_stages = is_compute ? 1 : ZINK_SHADER_COUNT;
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@ -683,6 +682,77 @@ update_descriptors(struct zink_context *ctx, struct zink_screen *screen, bool is
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else
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stages = &ctx->gfx_stages[0];
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for (int i = 0; i < num_stages; i++) {
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struct zink_shader *shader = stages[i];
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if (!shader)
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continue;
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enum pipe_shader_type stage = pipe_shader_type_from_mesa(shader->nir->info.stage);
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for (int j = 0; j < shader->num_bindings[zds->type]; j++) {
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int index = shader->bindings[zds->type][j].index;
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assert(shader->bindings[zds->type][j].type == VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER ||
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shader->bindings[zds->type][j].type == VK_DESCRIPTOR_TYPE_STORAGE_IMAGE);
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for (unsigned k = 0; k < shader->bindings[zds->type][j].size; k++) {
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VkImageView imageview = VK_NULL_HANDLE;
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struct zink_resource *res = NULL;
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VkImageLayout layout = VK_IMAGE_LAYOUT_UNDEFINED;
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struct zink_image_view *image_view = &ctx->image_views[stage][index + k];
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assert(image_view);
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res = zink_resource(image_view->base.resource);
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if (res && image_view->base.resource->target == PIPE_BUFFER) {
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wds[num_wds].pTexelBufferView = &image_view->buffer_view;
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} else if (res) {
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imageview = image_view->surface->image_view;
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layout = VK_IMAGE_LAYOUT_GENERAL;
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}
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assert(num_resources < num_bindings);
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desc_set_image_add(zds, image_view, num_resources, cache_hit);
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if (res) {
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VkAccessFlags flags = 0;
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if (image_view->base.access & PIPE_IMAGE_ACCESS_READ)
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flags |= VK_ACCESS_SHADER_READ_BIT;
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if (image_view->base.access & PIPE_IMAGE_ACCESS_WRITE)
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flags |= VK_ACCESS_SHADER_WRITE_BIT;
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add_transition(res, layout, flags, stage, &transitions[*num_transitions], num_transitions, transition_hash);
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if (image_view->base.access & PIPE_IMAGE_ACCESS_WRITE)
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write_descriptor_resource(&resources[num_resources], res, &num_resources);
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else
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read_descriptor_resource(&resources[num_resources], res, &num_resources);
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}
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assert(num_image_info < num_bindings);
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handle_image_descriptor(screen, res, zds->type, shader->bindings[zds->type][j].type,
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&wds[num_wds], layout, &num_image_info, &image_infos[num_image_info],
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NULL, &buffer_view[0], imageview, !k);
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struct zink_batch *batch = is_compute ? &ctx->compute_batch : zink_curr_batch(ctx);
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if (image_view->surface)
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zink_batch_reference_surface(batch, image_view->surface);
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}
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assert(num_wds < num_descriptors);
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wds[num_wds].sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET;
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wds[num_wds].pNext = NULL;
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wds[num_wds].dstBinding = shader->bindings[zds->type][j].binding;
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wds[num_wds].dstArrayElement = 0;
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wds[num_wds].descriptorCount = shader->bindings[zds->type][j].size;
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wds[num_wds].descriptorType = shader->bindings[zds->type][j].type;
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wds[num_wds].dstSet = zds->desc_set;
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++num_wds;
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}
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}
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return bind_descriptors(ctx, zds, num_wds, wds, num_resources, resources, NULL, 0, is_compute, cache_hit);
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}
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static void
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update_descriptors(struct zink_context *ctx, struct zink_screen *screen, bool is_compute)
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{
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struct zink_program *pg = is_compute ? (struct zink_program *)ctx->curr_compute : (struct zink_program *)ctx->curr_program;
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unsigned num_bindings = zink_program_num_bindings(pg, is_compute);
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zink_context_update_descriptor_states(ctx, is_compute);
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bool cache_hit[ZINK_DESCRIPTOR_TYPES];
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struct zink_descriptor_set *zds[ZINK_DESCRIPTOR_TYPES];
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@ -702,149 +772,27 @@ update_descriptors(struct zink_context *ctx, struct zink_screen *screen, bool is
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bool need_flush = false;
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if (zds[ZINK_DESCRIPTOR_TYPE_UBO])
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need_flush |= update_ubo_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_UBO], transitions, &num_transitions, ht, is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_UBO]);
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need_flush |= update_ubo_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_UBO], transitions, &num_transitions, ht,
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is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_UBO]);
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assert(num_transitions <= num_bindings);
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if (zds[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW])
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need_flush |= update_sampler_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW], transitions, &num_transitions, ht, is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW]);
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need_flush |= update_sampler_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW], transitions, &num_transitions, ht,
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is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_SAMPLER_VIEW]);
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assert(num_transitions <= num_bindings);
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if (zds[ZINK_DESCRIPTOR_TYPE_SSBO])
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need_flush |= update_ssbo_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_SSBO], transitions, &num_transitions, ht, is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_SSBO]);
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need_flush |= update_ssbo_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_SSBO], transitions, &num_transitions, ht,
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is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_SSBO]);
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assert(num_transitions <= num_bindings);
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if (zds[ZINK_DESCRIPTOR_TYPE_IMAGE])
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need_flush |= update_image_descriptors(ctx, zds[ZINK_DESCRIPTOR_TYPE_IMAGE], transitions, &num_transitions, ht,
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is_compute, cache_hit[ZINK_DESCRIPTOR_TYPE_IMAGE]);
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assert(num_transitions <= num_bindings);
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for (int h = ZINK_DESCRIPTOR_TYPE_IMAGE; h < ZINK_DESCRIPTOR_TYPES; h++) {
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for (int i = 0; i < num_stages; i++) {
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struct zink_shader *shader = stages[i];
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if (!shader)
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continue;
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enum pipe_shader_type stage = pipe_shader_type_from_mesa(shader->nir->info.stage);
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for (int j = 0; j < shader->num_bindings[h]; j++) {
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int index = shader->bindings[h][j].index;
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for (unsigned k = 0; k < shader->bindings[h][j].size; k++) {
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VkImageView imageview = VK_NULL_HANDLE;
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struct zink_resource *res = NULL;
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VkImageLayout layout = VK_IMAGE_LAYOUT_UNDEFINED;
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switch (shader->bindings[h][j].type) {
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case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
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/* fallthrough */
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case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: {
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struct zink_image_view *image_view = &ctx->image_views[stage][index + k];
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assert(image_view);
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assert(num_surface_refs < num_image_bindings);
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surface_refs[num_surface_refs++] = image_view->surface;
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res = zink_resource(image_view->base.resource);
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if (!res)
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break;
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if (image_view->base.resource->target == PIPE_BUFFER) {
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wds[h][num_wds[h]].pTexelBufferView = &image_view->buffer_view;
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} else {
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imageview = image_view->surface->image_view;
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layout = VK_IMAGE_LAYOUT_GENERAL;
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}
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VkAccessFlags flags = 0;
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if (image_view->base.access & PIPE_IMAGE_ACCESS_READ)
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flags |= VK_ACCESS_SHADER_READ_BIT;
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if (image_view->base.access & PIPE_IMAGE_ACCESS_WRITE)
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flags |= VK_ACCESS_SHADER_WRITE_BIT;
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add_transition(res, layout, VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT, stage, &transitions[num_transitions], &num_transitions, ht);
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assert(num_resources[h] < num_bindings);
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desc_set_image_add(zds[h], image_view, num_resources[h], cache_hit[h]);
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if (image_view->base.access & PIPE_IMAGE_ACCESS_WRITE)
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write_descriptor_resource(&resources[h][num_resources[h]], res, &num_resources[h]);
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else
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read_descriptor_resource(&resources[h][num_resources[h]], res, &num_resources[h]);
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}
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break;
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default:
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unreachable("unknown descriptor type");
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}
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if (!res) {
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/* if we're hitting this assert often, we can probably just throw a junk buffer in since
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* the results of this codepath are undefined in ARB_texture_buffer_object spec
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*/
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assert(screen->info.rb2_feats.nullDescriptor);
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assert(num_resources[h] < num_bindings);
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read_descriptor_resource(&resources[h][num_resources[h]], res, &num_resources[h]);
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switch (shader->bindings[h][j].type) {
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case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
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wds[h][num_wds[h]].pTexelBufferView = &buffer_view[0];
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break;
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case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
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assert(num_image_info[h] < num_bindings);
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image_infos[h][num_image_info[h]].imageLayout = VK_IMAGE_LAYOUT_UNDEFINED;
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image_infos[h][num_image_info[h]].imageView = VK_NULL_HANDLE;
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if (!k)
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wds[h][num_wds[h]].pImageInfo = image_infos[h] + num_image_info[h];
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++num_image_info[h];
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break;
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default:
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unreachable("unknown descriptor type");
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}
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} else if (res->base.target != PIPE_BUFFER) {
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assert(layout != VK_IMAGE_LAYOUT_UNDEFINED);
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assert(num_image_info[h] < num_bindings);
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image_infos[h][num_image_info[h]].imageLayout = layout;
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image_infos[h][num_image_info[h]].imageView = imageview;
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if (!k)
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wds[h][num_wds[h]].pImageInfo = image_infos[h] + num_image_info[h];
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++num_image_info[h];
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}
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assert(num_transitions <= num_bindings);
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assert(num_resources[h] <= num_bindings);
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}
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wds[h][num_wds[h]].sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET;
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wds[h][num_wds[h]].pNext = NULL;
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wds[h][num_wds[h]].dstBinding = shader->bindings[h][j].binding;
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wds[h][num_wds[h]].dstArrayElement = 0;
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wds[h][num_wds[h]].descriptorCount = shader->bindings[h][j].size;
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wds[h][num_wds[h]].descriptorType = shader->bindings[h][j].type;
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++num_wds[h];
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assert(num_transitions <= num_bindings);
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assert(num_resources[h] <= num_bindings);
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}
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}
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}
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_mesa_set_destroy(ht, NULL);
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unsigned check_flush_id = is_compute ? 0 : ZINK_COMPUTE_BATCH_ID;
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for (int h = ZINK_DESCRIPTOR_TYPE_IMAGE; h < ZINK_DESCRIPTOR_TYPES; h++) {
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if (!zds[h])
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continue;
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assert(zds[h]->desc_set);
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for (int i = 0; i < num_wds[h]; ++i)
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wds[h][i].dstSet = zds[h]->desc_set;
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for (int i = 0; i < num_resources[h]; ++i) {
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assert(num_resources[h] <= zink_program_num_bindings_typed(pg, h, is_compute));
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assert(num_resources[h] <= zds[h]->num_resources);
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struct zink_resource *res = resources[h][i].res;
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if (res) {
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need_flush |= zink_batch_reference_resource_rw(batch, res, resources[h][i].write) == check_flush_id;
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}
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}
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if (!cache_hit[h] && num_wds[h])
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vkUpdateDescriptorSets(screen->dev, num_wds[h], wds[h], 0, NULL);
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if (is_compute)
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vkCmdBindDescriptorSets(batch->cmdbuf, VK_PIPELINE_BIND_POINT_COMPUTE,
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ctx->curr_compute->base.layout, h, 1, &zds[h]->desc_set, 0, NULL);
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else
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vkCmdBindDescriptorSets(batch->cmdbuf, VK_PIPELINE_BIND_POINT_GRAPHICS,
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ctx->curr_program->base.layout, h, 1, &zds[h]->desc_set, 0, NULL);
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}
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for (int i = 0; i < num_transitions; ++i) {
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zink_resource_barrier(ctx, NULL, transitions[i].res,
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transitions[i].layout, transitions[i].access, transitions[i].stage);
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}
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for (int i = 0; i < num_surface_refs; i++) {
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if (surface_refs[i])
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zink_batch_reference_surface(batch, surface_refs[i]);
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}
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if (!need_flush)
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return;
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