iris: Flush caches based on brw_compiler::indirect_ubos_use_sampler
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7230>
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@ -171,12 +171,14 @@ iris_upload_ubo_ssbo_surf_state(struct iris_context *ice,
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struct iris_bo *surf_bo = iris_resource_bo(surf_state->res);
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surf_state->offset += iris_bo_offset_from_base_address(surf_bo);
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const bool dataport = ssbo || !screen->compiler->indirect_ubos_use_sampler;
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isl_buffer_fill_state(&screen->isl_dev, map,
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.address = res->bo->gtt_offset + res->offset +
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buf->buffer_offset,
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.size_B = buf->buffer_size - res->offset,
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.format = ssbo ? ISL_FORMAT_RAW
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: ISL_FORMAT_R32G32B32A32_FLOAT,
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.format = dataport ? ISL_FORMAT_RAW
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: ISL_FORMAT_R32G32B32A32_FLOAT,
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.swizzle = ISL_SWIZZLE_IDENTITY,
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.stride_B = 1,
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.mocs = iris_mocs(res->bo, &screen->isl_dev, usage));
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@ -1984,7 +1984,7 @@ iris_transfer_flush_region(struct pipe_context *ctx,
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history_flush |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
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if (map->dest_had_defined_contents)
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history_flush |= iris_flush_bits_for_history(res);
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history_flush |= iris_flush_bits_for_history(ice, res);
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util_range_add(&res->base, &res->valid_buffer_range, box->x, box->x + box->width);
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}
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@ -2132,13 +2132,18 @@ iris_dirty_for_history(struct iris_context *ice,
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* resource becomes visible, and any stale read cache data is invalidated.
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*/
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uint32_t
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iris_flush_bits_for_history(struct iris_resource *res)
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iris_flush_bits_for_history(struct iris_context *ice,
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struct iris_resource *res)
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{
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struct iris_screen *screen = (struct iris_screen *) ice->ctx.screen;
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uint32_t flush = PIPE_CONTROL_CS_STALL;
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if (res->bind_history & PIPE_BIND_CONSTANT_BUFFER) {
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flush |= PIPE_CONTROL_CONST_CACHE_INVALIDATE |
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PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
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flush |= PIPE_CONTROL_CONST_CACHE_INVALIDATE;
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flush |= screen->compiler->indirect_ubos_use_sampler ?
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PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE :
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PIPE_CONTROL_DATA_CACHE_FLUSH;
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}
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if (res->bind_history & PIPE_BIND_SAMPLER_VIEW)
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@ -2163,7 +2168,7 @@ iris_flush_and_dirty_for_history(struct iris_context *ice,
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if (res->base.target != PIPE_BUFFER)
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return;
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uint32_t flush = iris_flush_bits_for_history(res) | extra_flags;
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uint32_t flush = iris_flush_bits_for_history(ice, res) | extra_flags;
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iris_emit_pipe_control_flush(batch, reason, flush);
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@ -320,7 +320,8 @@ void iris_init_screen_resource_functions(struct pipe_screen *pscreen);
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void iris_dirty_for_history(struct iris_context *ice,
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struct iris_resource *res);
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uint32_t iris_flush_bits_for_history(struct iris_resource *res);
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uint32_t iris_flush_bits_for_history(struct iris_context *ice,
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struct iris_resource *res);
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void iris_flush_and_dirty_for_history(struct iris_context *ice,
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struct iris_batch *batch,
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@ -3684,7 +3684,7 @@ iris_set_stream_output_targets(struct pipe_context *ctx,
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if (tgt) {
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struct iris_resource *res = (void *) tgt->base.buffer;
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flush |= iris_flush_bits_for_history(res);
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flush |= iris_flush_bits_for_history(ice, res);
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iris_dirty_for_history(ice, res);
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}
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}
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