r600g: make some scissor regs invariant on evergreen
We only need one scissor for the framebuffer. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
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@ -52,9 +52,6 @@ static const struct r600_reg evergreen_context_reg_list[] = {
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028014_DB_HTILE_DATA_BASE, REG_FLAG_NEED_BO, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028030_PA_SC_SCREEN_SCISSOR_TL, 0, 0},
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{R_028034_PA_SC_SCREEN_SCISSOR_BR, 0, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028040_DB_Z_INFO, REG_FLAG_NEED_BO, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028044_DB_STENCIL_INFO, 0, 0},
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@ -78,8 +75,6 @@ static const struct r600_reg evergreen_context_reg_list[] = {
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{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
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{R_028238_CB_TARGET_MASK, 0, 0},
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{R_02823C_CB_SHADER_MASK, 0, 0},
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{R_028240_PA_SC_GENERIC_SCISSOR_TL, 0, 0},
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{R_028244_PA_SC_GENERIC_SCISSOR_BR, 0, 0},
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{R_028250_PA_SC_VPORT_SCISSOR_0_TL, 0, 0},
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{R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0, 0},
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{R_028350_SX_MISC, 0, 0},
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@ -324,9 +319,6 @@ static const struct r600_reg cayman_context_reg_list[] = {
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028014_DB_HTILE_DATA_BASE, REG_FLAG_NEED_BO, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028030_PA_SC_SCREEN_SCISSOR_TL, 0, 0},
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{R_028034_PA_SC_SCREEN_SCISSOR_BR, 0, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028040_DB_Z_INFO, REG_FLAG_NEED_BO, 0},
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{GROUP_FORCE_NEW_BLOCK, 0, 0},
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{R_028044_DB_STENCIL_INFO, 0, 0},
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@ -350,8 +342,6 @@ static const struct r600_reg cayman_context_reg_list[] = {
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{R_028234_PA_SU_HARDWARE_SCREEN_OFFSET, 0, 0},
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{R_028238_CB_TARGET_MASK, 0, 0},
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{R_02823C_CB_SHADER_MASK, 0, 0},
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{R_028240_PA_SC_GENERIC_SCISSOR_TL, 0, 0},
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{R_028244_PA_SC_GENERIC_SCISSOR_BR, 0, 0},
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{R_028250_PA_SC_VPORT_SCISSOR_0_TL, 0, 0},
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{R_028254_PA_SC_VPORT_SCISSOR_0_BR, 0, 0},
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{R_028350_SX_MISC, 0, 0},
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@ -1639,18 +1639,6 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
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evergreen_get_scissor_rect(rctx, 0, 0, state->width, state->height, &tl, &br);
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r600_pipe_state_add_reg(rstate,
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R_028240_PA_SC_GENERIC_SCISSOR_TL, tl,
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NULL, 0);
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r600_pipe_state_add_reg(rstate,
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R_028244_PA_SC_GENERIC_SCISSOR_BR, br,
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NULL, 0);
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r600_pipe_state_add_reg(rstate,
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R_028030_PA_SC_SCREEN_SCISSOR_TL, tl,
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NULL, 0);
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r600_pipe_state_add_reg(rstate,
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R_028034_PA_SC_SCREEN_SCISSOR_BR, br,
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NULL, 0);
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r600_pipe_state_add_reg(rstate,
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R_028204_PA_SC_WINDOW_SCISSOR_TL, tl,
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NULL, 0);
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@ -1872,6 +1860,14 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx)
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r600_store_value(cb, 0x3F800000); /* CM_R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ */
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r600_store_value(cb, 0x3F800000); /* CM_R_028BF4_PA_CL_GB_HORZ_DISC_ADJ */
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r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
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r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
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r600_store_value(cb, S_028244_BR_X(16384) | S_028244_BR_Y(16384)); /* R_028244_PA_SC_GENERIC_SCISSOR_BR */
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r600_store_context_reg_seq(cb, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2);
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r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */
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r600_store_value(cb, S_028034_BR_X(16384) | S_028034_BR_Y(16384)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */
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r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
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r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
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r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
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@ -2346,6 +2342,14 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx)
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r600_store_context_reg(cb, R_028C3C_PA_SC_AA_MASK, ~0);
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r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
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r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
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r600_store_value(cb, S_028244_BR_X(16384) | S_028244_BR_Y(16384)); /* R_028244_PA_SC_GENERIC_SCISSOR_BR */
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r600_store_context_reg_seq(cb, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2);
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r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */
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r600_store_value(cb, S_028034_BR_X(16384) | S_028034_BR_Y(16384)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */
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r600_store_context_reg(cb, R_028848_SQ_PGM_RESOURCES_2_PS, S_028848_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
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r600_store_context_reg(cb, R_028864_SQ_PGM_RESOURCES_2_VS, S_028864_SINGLE_ROUND(V_SQ_ROUND_TO_ZERO));
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r600_store_context_reg(cb, R_0288A8_SQ_PGM_RESOURCES_FS, 0);
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