radv: set RADEON_FLAG_GTT_WC flag for prime memory
With display on iGPU and render on dGPU, VRR is not working. To fix this set RADEON_FLAG_GTT_WC flag when allocating memory for prime. This allows kernel function amdgpu_display_user_framebuffer_create() to allocate GTT memory with USWC flag making the buffer scanout for iGPU. This helps the ddx amdgpu_present_check_flip() function to return true. Now, xserver will flip the framebuffer instead of blit. Due to this VRR feature will work where iGPU supports USWC flag. v2: modify commit message with use case (Michel Dänzer) v3: allow GTT_WC flag only if VRAM_DOMAIN and NO_CPU_ACCESS (Bas Nieuwenhuizen) v4: add check for wsi_info is NULL v5: use wsi_info pointer to check for prime alloc (Bas Nieuwenhuizen) v6: set _GTT_WC flag when wsi_info pointer is not NULL (Bas Nieuwenhuizen) Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com> Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10657>
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@ -5180,8 +5180,20 @@ radv_alloc_memory(struct radv_device *device, const VkMemoryAllocateInfo *pAlloc
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vk_object_base_init(&device->vk, &mem->base, VK_OBJECT_TYPE_DEVICE_MEMORY);
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if (wsi_info && wsi_info->implicit_sync)
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flags |= RADEON_FLAG_IMPLICIT_SYNC;
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if (wsi_info) {
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if(wsi_info->implicit_sync)
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flags |= RADEON_FLAG_IMPLICIT_SYNC;
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/* In case of prime, linear buffer is allocated in default heap which is VRAM.
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* Due to this when display is connected to iGPU and render on dGPU, ddx
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* function amdgpu_present_check_flip() fails due to which there is blit
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* instead of flip. Setting the flag RADEON_FLAG_GTT_WC allows kernel to
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* allocate GTT memory in supported hardware where GTT can be directly scanout.
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* Using wsi_info variable check to set the flag RADEON_FLAG_GTT_WC so that
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* only for memory allocated by driver this flag is set.
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*/
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flags |= RADEON_FLAG_GTT_WC;
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}
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if (dedicate_info) {
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mem->image = radv_image_from_handle(dedicate_info->image);
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