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freedreno/regs: add extra bits for UBWC array pitch 

This is not completely tested, but matches the max array pitch allowed by
A6XX_TEX_CONST_9_FLAG_BUFFER_ARRAY_PITCH.

Note this still doesn't allow all image sizes, but it allows 16384x16384
cpp=4 images to work.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5678>
This commit is contained in:
Jonathan Marek 2020-06-28 19:57:42 -04:00 committed by Marge Bot
parent c425ca5566
commit cb10edd544
1 changed files with 2 additions and 2 deletions
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4
src/freedreno/registers/a6xx.xml
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@ -2449,7 +2449,7 @@ to upconvert to 32b float internally?
<reg64 offset="0x8900" name="RB_DEPTH_FLAG_BUFFER_BASE" type="waddress"/>
<reg32 offset="0x8902" name="RB_DEPTH_FLAG_BUFFER_PITCH">
<bitfield name="PITCH" low="0" high="10" shr="6" type="uint"/>
<bitfield name="ARRAY_PITCH" low="11" high="21" shr="7" type="uint"/>
<bitfield name="ARRAY_PITCH" low="11" high="24" shr="7" type="uint"/>
</reg32>
<array offset="0x8903" name="RB_MRT_FLAG_BUFFER" stride="3" length="8">
<reg32 offset="0" name="ADDR_LO"/>
@ -2457,7 +2457,7 @@ to upconvert to 32b float internally?
<reg64 offset="0" name="ADDR" type="waddress"/>
<reg32 offset="2" name="PITCH">
<bitfield name="PITCH" low="0" high="10" shr="6" type="uint"/>
<bitfield name="ARRAY_PITCH" low="11" high="21" shr="7" type="uint"/> <!-- ??? -->
<bitfield name="ARRAY_PITCH" low="11" high="24" shr="7" type="uint"/> <!-- ??? -->
</reg32>
</array>
<reg32 offset="0x8927" name="RB_SAMPLE_COUNT_ADDR_LO"/>