diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 738f68db9b1..ecddf358738 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -863,6 +863,7 @@ static const driOptionDescription radv_dri_options[] = {
DRI_CONF_RADV_INVARIANT_GEOM(false)
DRI_CONF_RADV_DISABLE_TC_COMPAT_HTILE_GENERAL(false)
DRI_CONF_RADV_DISABLE_DCC(false)
+ DRI_CONF_RADV_REPORT_APU_AS_DGPU(false)
DRI_CONF_SECTION_END
};
// clang-format on
@@ -902,6 +903,9 @@ radv_init_dri_options(struct radv_instance *instance)
if (driQueryOptionb(&instance->dri_options, "radv_disable_dcc"))
instance->debug_flags |= RADV_DEBUG_NO_DCC;
+
+ instance->report_apu_as_dgpu =
+ driQueryOptionb(&instance->dri_options, "radv_report_apu_as_dgpu");
}
VkResult
@@ -1826,13 +1830,20 @@ radv_GetPhysicalDeviceProperties(VkPhysicalDevice physicalDevice,
.nonCoherentAtomSize = 64,
};
+ VkPhysicalDeviceType device_type;
+
+ if (pdevice->rad_info.has_dedicated_vram || pdevice->instance->report_apu_as_dgpu) {
+ device_type = VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU;
+ } else {
+ device_type = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
+ }
+
*pProperties = (VkPhysicalDeviceProperties){
.apiVersion = RADV_API_VERSION,
.driverVersion = vk_get_driver_version(),
.vendorID = ATI_VENDOR_ID,
.deviceID = pdevice->rad_info.pci_id,
- .deviceType = pdevice->rad_info.has_dedicated_vram ? VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU
- : VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU,
+ .deviceType = device_type,
.limits = limits,
.sparseProperties =
{
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 045af48628f..b98b5cc2abd 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -333,6 +333,7 @@ struct radv_instance {
bool disable_tc_compat_htile_in_general;
bool disable_shrink_image_store;
bool absolute_depth_bias;
+ bool report_apu_as_dgpu;
};
VkResult radv_init_wsi(struct radv_physical_device *physical_device);
diff --git a/src/util/00-mesa-defaults.conf b/src/util/00-mesa-defaults.conf
index c899793ec4a..a1cbe28110b 100644
--- a/src/util/00-mesa-defaults.conf
+++ b/src/util/00-mesa-defaults.conf
@@ -843,5 +843,9 @@ TODO: document the other workarounds.
+
+
+
+
diff --git a/src/util/driconf.h b/src/util/driconf.h
index 44e1d5bdd8b..3a90832faff 100644
--- a/src/util/driconf.h
+++ b/src/util/driconf.h
@@ -513,4 +513,8 @@
DRI_CONF_OPT_B(radv_disable_dcc, def, \
"Disable DCC for color images")
+#define DRI_CONF_RADV_REPORT_APU_AS_DGPU(def) \
+ DRI_CONF_OPT_B(radv_report_apu_as_dgpu, def, \
+ "Report APUs as discrete GPUs instead of integrated GPUs")
+
#endif