radeonsi: use pipe_draw_info::instance_count indirectly
It will be modified by compute shader culling. Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de> Acked-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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@ -493,6 +493,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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const struct pipe_draw_info *info,
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enum pipe_prim_type prim,
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unsigned num_patches,
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unsigned instance_count,
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bool primitive_restart)
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{
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union si_vgt_param_key key = sctx->ia_multi_vgt_param_key;
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@ -508,10 +509,10 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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}
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key.u.prim = prim;
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key.u.uses_instancing = info->indirect || info->instance_count > 1;
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key.u.uses_instancing = info->indirect || instance_count > 1;
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key.u.multi_instances_smaller_than_primgroup =
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info->indirect ||
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(info->instance_count > 1 &&
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(instance_count > 1 &&
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(info->count_from_stream_output ||
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si_num_prims_for_vertices(info, prim) < primgroup_size));
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key.u.primitive_restart = primitive_restart;
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@ -533,7 +534,7 @@ static unsigned si_get_ia_multi_vgt_param(struct si_context *sctx,
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if (sctx->family == CHIP_HAWAII &&
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G_028AA8_SWITCH_ON_EOI(ia_multi_vgt_param) &&
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(info->indirect ||
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(info->instance_count > 1 &&
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(instance_count > 1 &&
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(info->count_from_stream_output ||
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si_num_prims_for_vertices(info, prim) <= 1))))
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sctx->flags |= SI_CONTEXT_VGT_FLUSH;
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@ -617,6 +618,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
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const struct pipe_draw_info *info,
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enum pipe_prim_type prim,
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unsigned num_patches,
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unsigned instance_count,
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bool primitive_restart)
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{
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struct radeon_cmdbuf *cs = sctx->gfx_cs;
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@ -624,7 +626,7 @@ static void si_emit_draw_registers(struct si_context *sctx,
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unsigned ia_multi_vgt_param;
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ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info, prim, num_patches,
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primitive_restart);
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instance_count, primitive_restart);
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/* Draw state. */
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if (ia_multi_vgt_param != sctx->last_multi_vgt_param) {
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@ -673,7 +675,8 @@ static void si_emit_draw_packets(struct si_context *sctx,
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const struct pipe_draw_info *info,
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struct pipe_resource *indexbuf,
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unsigned index_size,
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unsigned index_offset)
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unsigned index_offset,
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unsigned instance_count)
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{
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struct pipe_draw_indirect_info *indirect = info->indirect;
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struct radeon_cmdbuf *cs = sctx->gfx_cs;
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@ -815,7 +818,6 @@ static void si_emit_draw_packets(struct si_context *sctx,
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radeon_emit(cs, di_src_sel);
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}
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} else {
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unsigned instance_count = info->instance_count;
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int base_vertex;
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if (sctx->last_instance_count == SI_INSTANCE_COUNT_UNKNOWN ||
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@ -1222,8 +1224,8 @@ static void si_get_draw_start_count(struct si_context *sctx,
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}
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static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_info *info,
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enum pipe_prim_type prim, bool primitive_restart,
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unsigned skip_atom_mask)
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enum pipe_prim_type prim, unsigned instance_count,
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bool primitive_restart, unsigned skip_atom_mask)
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{
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unsigned num_patches = 0;
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@ -1254,7 +1256,8 @@ static void si_emit_all_states(struct si_context *sctx, const struct pipe_draw_i
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/* Emit draw states. */
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si_emit_vs_state(sctx, info);
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si_emit_draw_registers(sctx, info, prim, num_patches, primitive_restart);
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si_emit_draw_registers(sctx, info, prim, num_patches, instance_count,
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primitive_restart);
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}
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static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info)
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@ -1266,6 +1269,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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enum pipe_prim_type rast_prim, prim = info->mode;
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unsigned index_size = info->index_size;
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unsigned index_offset = info->indirect ? info->start * index_size : 0;
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unsigned instance_count = info->instance_count;
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bool primitive_restart = info->primitive_restart;
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if (likely(!info->indirect)) {
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@ -1273,7 +1277,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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* no workaround for indirect draws, but we can at least skip
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* direct draws.
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*/
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if (unlikely(!info->instance_count))
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if (unlikely(!instance_count))
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return;
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/* Handle count == 0. */
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@ -1487,7 +1491,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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goto return_cleanup;
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/* Emit all states except possibly render condition. */
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si_emit_all_states(sctx, info, prim, primitive_restart, masked_atoms);
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si_emit_all_states(sctx, info, prim, instance_count,
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primitive_restart, masked_atoms);
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si_emit_cache_flush(sctx);
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/* <-- CUs are idle here. */
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@ -1501,7 +1506,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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sctx->dirty_atoms = 0;
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si_emit_draw_packets(sctx, info, indexbuf, index_size, index_offset);
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si_emit_draw_packets(sctx, info, indexbuf, index_size, index_offset,
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instance_count);
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/* <-- CUs are busy here. */
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/* Start prefetches after the draw has been started. Both will run
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@ -1523,7 +1529,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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if (!si_upload_graphics_shader_descriptors(sctx))
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return;
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si_emit_all_states(sctx, info, prim, primitive_restart, masked_atoms);
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si_emit_all_states(sctx, info, prim, instance_count,
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primitive_restart, masked_atoms);
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if (has_gfx9_scissor_bug &&
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(sctx->context_roll ||
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@ -1532,7 +1539,8 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
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sctx->dirty_atoms = 0;
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si_emit_draw_packets(sctx, info, indexbuf, index_size, index_offset);
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si_emit_draw_packets(sctx, info, indexbuf, index_size, index_offset,
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instance_count);
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/* Prefetch the remaining shaders after the draw has been
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* started. */
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