turnip: Convert fd_dev_info to const pointer

Split out from earlier patch to reduce churn.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
This commit is contained in:
Rob Clark 2021-07-07 18:46:49 -07:00 committed by Marge Bot
parent 8f6715862f
commit c9bcd835fa
10 changed files with 31 additions and 32 deletions

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@ -2597,9 +2597,9 @@ tu_store_gmem_attachment(struct tu_cmd_buffer *cmd,
y2 != iview->extent.height || iview->need_y2_align;
bool unaligned =
x1 % phys_dev->info.gmem_align_w ||
(x2 % phys_dev->info.gmem_align_w && x2 != iview->extent.width) ||
y1 % phys_dev->info.gmem_align_h || (y2 % phys_dev->info.gmem_align_h && need_y2_align);
x1 % phys_dev->info->gmem_align_w ||
(x2 % phys_dev->info->gmem_align_w && x2 != iview->extent.width) ||
y1 % phys_dev->info->gmem_align_h || (y2 % phys_dev->info->gmem_align_h && need_y2_align);
/* D32_SFLOAT_S8_UINT is quite special format: it has two planes,
* one for depth and other for stencil. When resolving a MSAA

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@ -389,10 +389,10 @@ tu6_emit_blit_scissor(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool align)
uint32_t y2 = y1 + render_area->extent.height - 1;
if (align) {
x1 = x1 & ~(phys_dev->info.gmem_align_w - 1);
y1 = y1 & ~(phys_dev->info.gmem_align_h - 1);
x2 = ALIGN_POT(x2 + 1, phys_dev->info.gmem_align_w) - 1;
y2 = ALIGN_POT(y2 + 1, phys_dev->info.gmem_align_h) - 1;
x1 = x1 & ~(phys_dev->info->gmem_align_w - 1);
y1 = y1 & ~(phys_dev->info->gmem_align_h - 1);
x2 = ALIGN_POT(x2 + 1, phys_dev->info->gmem_align_w) - 1;
y2 = ALIGN_POT(y2 + 1, phys_dev->info->gmem_align_h) - 1;
}
tu_cs_emit_regs(cs,
@ -910,10 +910,10 @@ tu6_emit_binning_pass(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
update_vsc_pipe(cmd, cs);
tu_cs_emit_regs(cs,
A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info.a6xx.magic.PC_UNKNOWN_9805));
A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info->a6xx.magic.PC_UNKNOWN_9805));
tu_cs_emit_regs(cs,
A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info.a6xx.magic.SP_UNKNOWN_A0F8));
A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info->a6xx.magic.SP_UNKNOWN_A0F8));
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
tu_cs_emit(cs, UNK_2C);
@ -1015,7 +1015,7 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
dst[0] &= ~(A6XX_TEX_CONST_0_FMT__MASK |
A6XX_TEX_CONST_0_SWIZ_X__MASK | A6XX_TEX_CONST_0_SWIZ_Y__MASK |
A6XX_TEX_CONST_0_SWIZ_Z__MASK | A6XX_TEX_CONST_0_SWIZ_W__MASK);
if (!cmd->device->physical_device->info.a6xx.has_z24uint_s8uint) {
if (!cmd->device->physical_device->info->a6xx.has_z24uint_s8uint) {
dst[0] |= A6XX_TEX_CONST_0_FMT(FMT6_8_8_8_8_UINT) |
A6XX_TEX_CONST_0_SWIZ_X(A6XX_TEX_W) |
A6XX_TEX_CONST_0_SWIZ_Y(A6XX_TEX_ZERO) |
@ -1203,9 +1203,9 @@ tu6_tile_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
tu_cs_emit_regs(cs,
A6XX_VFD_MODE_CNTL(0));
tu_cs_emit_regs(cs, A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info.a6xx.magic.PC_UNKNOWN_9805));
tu_cs_emit_regs(cs, A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info->a6xx.magic.PC_UNKNOWN_9805));
tu_cs_emit_regs(cs, A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info.a6xx.magic.SP_UNKNOWN_A0F8));
tu_cs_emit_regs(cs, A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info->a6xx.magic.SP_UNKNOWN_A0F8));
tu_cs_emit_pkt7(cs, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
tu_cs_emit(cs, 0x1);

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@ -203,11 +203,10 @@ tu_physical_device_init(struct tu_physical_device *device,
}
switch (device->gpu_id / 100) {
case 6:
// TODO convert to pointer:
device->info = *info;
device->ccu_offset_bypass = device->info.num_ccu * A6XX_CCU_DEPTH_SIZE;
device->info = info;
device->ccu_offset_bypass = device->info->num_ccu * A6XX_CCU_DEPTH_SIZE;
device->ccu_offset_gmem = (device->gmem_size -
device->info.num_ccu * A6XX_CCU_GMEM_COLOR_SIZE);
device->info->num_ccu * A6XX_CCU_GMEM_COLOR_SIZE);
break;
default:
result = vk_startup_errorf(instance, VK_ERROR_INITIALIZATION_FAILED,

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@ -556,7 +556,7 @@ tu_get_image_format_properties(
return VK_ERROR_FORMAT_NOT_SUPPORTED;
if (!ubwc_possible(info->format, info->type, info->usage, info->usage, physical_device->info.a6xx.has_z24uint_s8uint, sampleCounts))
if (!ubwc_possible(info->format, info->type, info->usage, info->usage, physical_device->info->a6xx.has_z24uint_s8uint, sampleCounts))
return VK_ERROR_FORMAT_NOT_SUPPORTED;
format_feature_flags = format_props.optimalTilingFeatures;

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@ -609,7 +609,7 @@ tu_CreateImage(VkDevice _device,
if (!ubwc_possible(image->vk_format, pCreateInfo->imageType, pCreateInfo->usage,
stencil_usage_info ? stencil_usage_info->stencilUsage : pCreateInfo->usage,
device->physical_device->info.a6xx.has_z24uint_s8uint, pCreateInfo->samples))
device->physical_device->info->a6xx.has_z24uint_s8uint, pCreateInfo->samples))
ubwc_enabled = false;
/* expect UBWC enabled if we asked for it */
@ -806,7 +806,7 @@ tu_CreateImageView(VkDevice _device,
if (view == NULL)
return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
tu_image_view_init(view, pCreateInfo, device->physical_device->info.a6xx.has_z24uint_s8uint);
tu_image_view_init(view, pCreateInfo, device->physical_device->info->a6xx.has_z24uint_s8uint);
*pView = tu_image_view_to_handle(view);

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@ -78,7 +78,7 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
bool progress = false;
if (!dev->physical_device->info.a6xx.supports_multiview_mask)
if (!dev->physical_device->info->a6xx.supports_multiview_mask)
NIR_PASS(progress, nir, lower_multiview_mask, &mask);
unsigned num_views = util_logbase2(mask) + 1;
@ -88,7 +88,7 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
* tests pass on a640/a650 and fail on a630.
*/
unsigned max_views_for_multipos =
dev->physical_device->info.a6xx.supports_multiview_mask ? 16 : 10;
dev->physical_device->info->a6xx.supports_multiview_mask ? 16 : 10;
/* Speculatively assign output locations so that we know num_outputs. We
* will assign output locations for real after this pass.

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@ -343,8 +343,8 @@ tu_render_pass_gmem_config(struct tu_render_pass *pass,
const struct tu_physical_device *phys_dev)
{
uint32_t block_align_shift = 3; /* log2(gmem_align/(tile_align_w*tile_align_h)) */
uint32_t tile_align_w = phys_dev->info.tile_align_w;
uint32_t gmem_align = (1 << block_align_shift) * tile_align_w * phys_dev->info.tile_align_h;
uint32_t tile_align_w = phys_dev->info->tile_align_w;
uint32_t gmem_align = (1 << block_align_shift) * tile_align_w * phys_dev->info->tile_align_h;
/* calculate total bytes per pixel */
uint32_t cpp_total = 0;
@ -688,8 +688,8 @@ tu_GetRenderAreaGranularity(VkDevice _device,
VkExtent2D *pGranularity)
{
TU_FROM_HANDLE(tu_device, device, _device);
pGranularity->width = device->physical_device->info.gmem_align_w;
pGranularity->height = device->physical_device->info.gmem_align_h;
pGranularity->width = device->physical_device->info->gmem_align_w;
pGranularity->height = device->physical_device->info->gmem_align_h;
}
uint32_t

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@ -1622,7 +1622,7 @@ tu6_emit_program(struct tu_cs *cs,
tu_cs_emit(cs, multiview_cntl);
if (multiview_cntl &&
builder->device->physical_device->info.a6xx.supports_multiview_mask) {
builder->device->physical_device->info->a6xx.supports_multiview_mask) {
tu_cs_emit_pkt4(cs, REG_A6XX_PC_MULTIVIEW_MASK, 1);
tu_cs_emit(cs, builder->multiview_mask);
}
@ -2064,14 +2064,14 @@ calc_pvtmem_size(struct tu_device *dev, struct tu_pvtmem_config *config,
{
uint32_t per_fiber_size = ALIGN(pvtmem_bytes, 512);
uint32_t per_sp_size =
ALIGN(per_fiber_size * dev->physical_device->info.a6xx.fibers_per_sp, 1 << 12);
ALIGN(per_fiber_size * dev->physical_device->info->a6xx.fibers_per_sp, 1 << 12);
if (config) {
config->per_fiber_size = per_fiber_size;
config->per_sp_size = per_sp_size;
}
return dev->physical_device->info.num_sp_cores * per_sp_size;
return dev->physical_device->info->num_sp_cores * per_sp_size;
}
static VkResult

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@ -210,7 +210,7 @@ struct tu_physical_device
uint32_t ccu_offset_gmem;
uint32_t ccu_offset_bypass;
struct fd_dev_info info;
const struct fd_dev_info *info;
int msm_major_version;
int msm_minor_version;

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@ -84,9 +84,9 @@ tu_tiling_config_update_tile_layout(struct tu_framebuffer *fb,
const struct tu_render_pass *pass)
{
const uint32_t tile_align_w = pass->tile_align_w;
const uint32_t tile_align_h = dev->physical_device->info.tile_align_h;
const uint32_t max_tile_width = dev->physical_device->info.tile_max_w;
const uint32_t max_tile_height = dev->physical_device->info.tile_max_h;
const uint32_t tile_align_h = dev->physical_device->info->tile_align_h;
const uint32_t max_tile_width = dev->physical_device->info->tile_max_w;
const uint32_t max_tile_height = dev->physical_device->info->tile_max_h;
/* start from 1 tile */
fb->tile_count = (VkExtent2D) {