turnip: Convert fd_dev_info to const pointer
Split out from earlier patch to reduce churn. Signed-off-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>
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@ -2597,9 +2597,9 @@ tu_store_gmem_attachment(struct tu_cmd_buffer *cmd,
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y2 != iview->extent.height || iview->need_y2_align;
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bool unaligned =
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x1 % phys_dev->info.gmem_align_w ||
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(x2 % phys_dev->info.gmem_align_w && x2 != iview->extent.width) ||
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y1 % phys_dev->info.gmem_align_h || (y2 % phys_dev->info.gmem_align_h && need_y2_align);
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x1 % phys_dev->info->gmem_align_w ||
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(x2 % phys_dev->info->gmem_align_w && x2 != iview->extent.width) ||
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y1 % phys_dev->info->gmem_align_h || (y2 % phys_dev->info->gmem_align_h && need_y2_align);
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/* D32_SFLOAT_S8_UINT is quite special format: it has two planes,
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* one for depth and other for stencil. When resolving a MSAA
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@ -389,10 +389,10 @@ tu6_emit_blit_scissor(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool align)
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uint32_t y2 = y1 + render_area->extent.height - 1;
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if (align) {
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x1 = x1 & ~(phys_dev->info.gmem_align_w - 1);
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y1 = y1 & ~(phys_dev->info.gmem_align_h - 1);
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x2 = ALIGN_POT(x2 + 1, phys_dev->info.gmem_align_w) - 1;
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y2 = ALIGN_POT(y2 + 1, phys_dev->info.gmem_align_h) - 1;
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x1 = x1 & ~(phys_dev->info->gmem_align_w - 1);
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y1 = y1 & ~(phys_dev->info->gmem_align_h - 1);
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x2 = ALIGN_POT(x2 + 1, phys_dev->info->gmem_align_w) - 1;
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y2 = ALIGN_POT(y2 + 1, phys_dev->info->gmem_align_h) - 1;
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}
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tu_cs_emit_regs(cs,
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@ -910,10 +910,10 @@ tu6_emit_binning_pass(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
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update_vsc_pipe(cmd, cs);
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tu_cs_emit_regs(cs,
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A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info.a6xx.magic.PC_UNKNOWN_9805));
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A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info->a6xx.magic.PC_UNKNOWN_9805));
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tu_cs_emit_regs(cs,
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A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info.a6xx.magic.SP_UNKNOWN_A0F8));
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A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info->a6xx.magic.SP_UNKNOWN_A0F8));
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tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
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tu_cs_emit(cs, UNK_2C);
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@ -1015,7 +1015,7 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
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dst[0] &= ~(A6XX_TEX_CONST_0_FMT__MASK |
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A6XX_TEX_CONST_0_SWIZ_X__MASK | A6XX_TEX_CONST_0_SWIZ_Y__MASK |
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A6XX_TEX_CONST_0_SWIZ_Z__MASK | A6XX_TEX_CONST_0_SWIZ_W__MASK);
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if (!cmd->device->physical_device->info.a6xx.has_z24uint_s8uint) {
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if (!cmd->device->physical_device->info->a6xx.has_z24uint_s8uint) {
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dst[0] |= A6XX_TEX_CONST_0_FMT(FMT6_8_8_8_8_UINT) |
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A6XX_TEX_CONST_0_SWIZ_X(A6XX_TEX_W) |
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A6XX_TEX_CONST_0_SWIZ_Y(A6XX_TEX_ZERO) |
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@ -1203,9 +1203,9 @@ tu6_tile_render_begin(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
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tu_cs_emit_regs(cs,
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A6XX_VFD_MODE_CNTL(0));
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tu_cs_emit_regs(cs, A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info.a6xx.magic.PC_UNKNOWN_9805));
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tu_cs_emit_regs(cs, A6XX_PC_UNKNOWN_9805(.unknown = phys_dev->info->a6xx.magic.PC_UNKNOWN_9805));
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tu_cs_emit_regs(cs, A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info.a6xx.magic.SP_UNKNOWN_A0F8));
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tu_cs_emit_regs(cs, A6XX_SP_UNKNOWN_A0F8(.unknown = phys_dev->info->a6xx.magic.SP_UNKNOWN_A0F8));
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tu_cs_emit_pkt7(cs, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
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tu_cs_emit(cs, 0x1);
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@ -203,11 +203,10 @@ tu_physical_device_init(struct tu_physical_device *device,
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}
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switch (device->gpu_id / 100) {
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case 6:
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// TODO convert to pointer:
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device->info = *info;
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device->ccu_offset_bypass = device->info.num_ccu * A6XX_CCU_DEPTH_SIZE;
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device->info = info;
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device->ccu_offset_bypass = device->info->num_ccu * A6XX_CCU_DEPTH_SIZE;
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device->ccu_offset_gmem = (device->gmem_size -
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device->info.num_ccu * A6XX_CCU_GMEM_COLOR_SIZE);
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device->info->num_ccu * A6XX_CCU_GMEM_COLOR_SIZE);
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break;
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default:
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result = vk_startup_errorf(instance, VK_ERROR_INITIALIZATION_FAILED,
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@ -556,7 +556,7 @@ tu_get_image_format_properties(
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return VK_ERROR_FORMAT_NOT_SUPPORTED;
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if (!ubwc_possible(info->format, info->type, info->usage, info->usage, physical_device->info.a6xx.has_z24uint_s8uint, sampleCounts))
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if (!ubwc_possible(info->format, info->type, info->usage, info->usage, physical_device->info->a6xx.has_z24uint_s8uint, sampleCounts))
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return VK_ERROR_FORMAT_NOT_SUPPORTED;
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format_feature_flags = format_props.optimalTilingFeatures;
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@ -609,7 +609,7 @@ tu_CreateImage(VkDevice _device,
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if (!ubwc_possible(image->vk_format, pCreateInfo->imageType, pCreateInfo->usage,
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stencil_usage_info ? stencil_usage_info->stencilUsage : pCreateInfo->usage,
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device->physical_device->info.a6xx.has_z24uint_s8uint, pCreateInfo->samples))
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device->physical_device->info->a6xx.has_z24uint_s8uint, pCreateInfo->samples))
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ubwc_enabled = false;
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/* expect UBWC enabled if we asked for it */
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@ -806,7 +806,7 @@ tu_CreateImageView(VkDevice _device,
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if (view == NULL)
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return vk_error(device->instance, VK_ERROR_OUT_OF_HOST_MEMORY);
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tu_image_view_init(view, pCreateInfo, device->physical_device->info.a6xx.has_z24uint_s8uint);
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tu_image_view_init(view, pCreateInfo, device->physical_device->info->a6xx.has_z24uint_s8uint);
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*pView = tu_image_view_to_handle(view);
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@ -78,7 +78,7 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
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bool progress = false;
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if (!dev->physical_device->info.a6xx.supports_multiview_mask)
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if (!dev->physical_device->info->a6xx.supports_multiview_mask)
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NIR_PASS(progress, nir, lower_multiview_mask, &mask);
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unsigned num_views = util_logbase2(mask) + 1;
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@ -88,7 +88,7 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
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* tests pass on a640/a650 and fail on a630.
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*/
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unsigned max_views_for_multipos =
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dev->physical_device->info.a6xx.supports_multiview_mask ? 16 : 10;
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dev->physical_device->info->a6xx.supports_multiview_mask ? 16 : 10;
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/* Speculatively assign output locations so that we know num_outputs. We
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* will assign output locations for real after this pass.
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@ -343,8 +343,8 @@ tu_render_pass_gmem_config(struct tu_render_pass *pass,
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const struct tu_physical_device *phys_dev)
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{
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uint32_t block_align_shift = 3; /* log2(gmem_align/(tile_align_w*tile_align_h)) */
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uint32_t tile_align_w = phys_dev->info.tile_align_w;
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uint32_t gmem_align = (1 << block_align_shift) * tile_align_w * phys_dev->info.tile_align_h;
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uint32_t tile_align_w = phys_dev->info->tile_align_w;
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uint32_t gmem_align = (1 << block_align_shift) * tile_align_w * phys_dev->info->tile_align_h;
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/* calculate total bytes per pixel */
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uint32_t cpp_total = 0;
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@ -688,8 +688,8 @@ tu_GetRenderAreaGranularity(VkDevice _device,
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VkExtent2D *pGranularity)
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{
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TU_FROM_HANDLE(tu_device, device, _device);
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pGranularity->width = device->physical_device->info.gmem_align_w;
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pGranularity->height = device->physical_device->info.gmem_align_h;
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pGranularity->width = device->physical_device->info->gmem_align_w;
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pGranularity->height = device->physical_device->info->gmem_align_h;
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}
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uint32_t
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@ -1622,7 +1622,7 @@ tu6_emit_program(struct tu_cs *cs,
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tu_cs_emit(cs, multiview_cntl);
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if (multiview_cntl &&
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builder->device->physical_device->info.a6xx.supports_multiview_mask) {
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builder->device->physical_device->info->a6xx.supports_multiview_mask) {
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tu_cs_emit_pkt4(cs, REG_A6XX_PC_MULTIVIEW_MASK, 1);
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tu_cs_emit(cs, builder->multiview_mask);
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}
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@ -2064,14 +2064,14 @@ calc_pvtmem_size(struct tu_device *dev, struct tu_pvtmem_config *config,
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{
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uint32_t per_fiber_size = ALIGN(pvtmem_bytes, 512);
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uint32_t per_sp_size =
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ALIGN(per_fiber_size * dev->physical_device->info.a6xx.fibers_per_sp, 1 << 12);
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ALIGN(per_fiber_size * dev->physical_device->info->a6xx.fibers_per_sp, 1 << 12);
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if (config) {
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config->per_fiber_size = per_fiber_size;
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config->per_sp_size = per_sp_size;
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}
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return dev->physical_device->info.num_sp_cores * per_sp_size;
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return dev->physical_device->info->num_sp_cores * per_sp_size;
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}
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static VkResult
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@ -210,7 +210,7 @@ struct tu_physical_device
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uint32_t ccu_offset_gmem;
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uint32_t ccu_offset_bypass;
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struct fd_dev_info info;
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const struct fd_dev_info *info;
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int msm_major_version;
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int msm_minor_version;
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@ -84,9 +84,9 @@ tu_tiling_config_update_tile_layout(struct tu_framebuffer *fb,
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const struct tu_render_pass *pass)
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{
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const uint32_t tile_align_w = pass->tile_align_w;
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const uint32_t tile_align_h = dev->physical_device->info.tile_align_h;
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const uint32_t max_tile_width = dev->physical_device->info.tile_max_w;
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const uint32_t max_tile_height = dev->physical_device->info.tile_max_h;
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const uint32_t tile_align_h = dev->physical_device->info->tile_align_h;
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const uint32_t max_tile_width = dev->physical_device->info->tile_max_w;
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const uint32_t max_tile_height = dev->physical_device->info->tile_max_h;
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/* start from 1 tile */
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fb->tile_count = (VkExtent2D) {
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