From c89024e4463389663cf7f7d2f2752de2029efb23 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 3 Feb 2022 11:33:26 +0200 Subject: [PATCH] intel/fs: don't set allow_sample_mask for CS intrinsics Signed-off-by: Lionel Landwerlin Fixes: 77486db867bd ("intel/fs: Disable sample mask predication for scratch stores") Reviewed-by: Caio Oliveira Part-of: --- src/intel/compiler/brw_fs_nir.cpp | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index c5897f45eb3..63c63389911 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -3945,7 +3945,10 @@ fs_visitor::nir_emit_cs_intrinsic(const fs_builder &bld, srcs[SURFACE_LOGICAL_SRC_SURFACE] = brw_imm_ud(GFX7_BTI_SLM); srcs[SURFACE_LOGICAL_SRC_ADDRESS] = get_nir_src(instr->src[1]); srcs[SURFACE_LOGICAL_SRC_IMM_DIMS] = brw_imm_ud(1); - srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(1); + /* No point in masking with sample mask, here we're handling compute + * intrinsics. + */ + srcs[SURFACE_LOGICAL_SRC_ALLOW_SAMPLE_MASK] = brw_imm_ud(0); fs_reg data = get_nir_src(instr->src[0]); data.type = brw_reg_type_from_bit_size(bit_size, BRW_REGISTER_TYPE_UD);